Datasheet > AS83C154-20

AS83C154-20

更新时间： 2024-10-28 08:35:39

品牌	Logo	应用领域
TEMIC		微控制器
页数	文件大小	规格书
24页	242K
描述
CMOS 0 to 36 MHz Single Chip 8-bit Microcontroller

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中文翻译

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数据手册

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AS83C154-20 数据手册

80C154/83C154

(MSB)

(LSB)

WDT

T32

SERR

IZC

P3HZ

P2HZ

P1HZ

ALF

Symbol

Position

Name and Significance

T32

IOCON.6

–

If T32 = 1 and if C/T0 = 0, T1 and T0 are programmed as a 32 bit TIMER.

If T32 = 1 and if C/T0 = 1, T1 and T0 are programmed as a 32 bit COUNTER.

WDT

IOCON.7

–

If WDT = 1 and according to the mode selected by TMOD, an 8 bit or 32 bit

WATCHDOG is configured from TIMERS 0 and 1.

32 Bit Mode

D T32 = 1 enables access to this mode. As shown in

figure 11, this 32 bit mode consists in cascading

TIMER 0 for the LSBs and TIMER 1 for the MSBs

Figure 10.32 Bit Timer/counter.

T32 = 1 starts the timer/counter and T32 = 0 stops it.

TIMERs evolves. Consequently, in 32 bit mode, if the

TIMER/COUNTER muste be stopped (T32 = 0), TR0

and TR1 must be set to 0.

It should be noted that as soon as T32 = 0. TIMERs 0 and

1 assume the configuration specified by register TMOD.

Moreover, if TR0 = 1 or if TR1 = 1, the content of the

32 Bit Timer

D Figure 12 illustrates the 32 bit TIMER mode.

Figure 11. 32 Bit Timer Configuration.

D In this mode, T32 = 1 and C/T0 = 0, the 32 bit timer D The following formula should be used to calculate the

is incremented on each S3P1 state of each machine

cycle. An overflow of TIMER 0 (TF0 has not been set

to 1) increments TIMER 1 and the overflow of the

32 bit TIMER is signalled by setting TF1 (S5P1) to 1.

required frequency :

OSC

f +

)

(

12 65536ć T0, Ă T1

MATRA MHS

Rev.F (14 Jan. 97)

1...7 8 91011 12 13...24

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