5秒后页面跳转
AS7C33256PFS32A-166TQI PDF预览

AS7C33256PFS32A-166TQI

更新时间: 2024-02-20 16:40:56
品牌 Logo 应用领域
ALSC 静态存储器
页数 文件大小 规格书
20页 528K
描述
3.3V 256K x 32/36 pipelined burst synchronous SRAM

AS7C33256PFS32A-166TQI 数据手册

 浏览型号AS7C33256PFS32A-166TQI的Datasheet PDF文件第3页浏览型号AS7C33256PFS32A-166TQI的Datasheet PDF文件第4页浏览型号AS7C33256PFS32A-166TQI的Datasheet PDF文件第5页浏览型号AS7C33256PFS32A-166TQI的Datasheet PDF文件第7页浏览型号AS7C33256PFS32A-166TQI的Datasheet PDF文件第8页浏览型号AS7C33256PFS32A-166TQI的Datasheet PDF文件第9页 
AS7C33256PFS32A  
AS7C33256PFS36A  
®
Write enable truth table (per byte)  
Function  
GWE BWE  
BWa  
X
BWb  
X
BWc  
BWd  
X
L
H
H
H
H
H
X
L
L
L
H
L
X
L
Write All Bytes  
L
L
L
Write Byte a  
L
H
H
L
H
Write Byte c and d  
H
H
L
X
X
X
H
X
Read  
H
H
H
Key: X = don’t care, L = low, H = high, n = a, b, c, d; BWE, BWn = internal write signal.  
Asynchronous Truth Table  
Operation  
Snooze mode  
ZZ  
H
L
OE  
X
I/O Status  
High-Z  
L
Dout  
Read  
L
H
High-Z  
Write  
L
X
Din, High-Z  
High-Z  
Deselected  
L
X
Burst order table  
Interleaved Burst Order (LBO=1)  
A1 A0 A1 A0 A1 A0 A1 A0  
Linear Burst Order (LBO=0)  
A1 A0 A1 A0 A1 A0 A1 A0  
Starting Address  
First increment  
0 0  
0 1  
1 0  
1 1  
0 1  
0 0  
1 1  
1 0  
1 0  
1 1  
0 0  
0 1  
1 1  
1 0  
0 1  
0 0  
Starting Address  
First increment  
0 0  
0 1  
1 0  
1 1  
0 1  
1 0  
1 1  
0 0  
1 0  
1 1  
0 0  
0 1  
1 1  
0 0  
0 1  
1 0  
Second increment  
Third increment  
Second increment  
Third increment  
11/30/04, v.3.1  
Alliance Semiconductor  
P. 6 of 20  

与AS7C33256PFS32A-166TQI相关器件

型号 品牌 描述 获取价格 数据表
AS7C33256PFS32A-166TQIN ALSC 3.3V 256K x 32/36 pipelined burst synchronous SRAM

获取价格

AS7C33256PFS32A2-100BC ISSI SRAM

获取价格

AS7C33256PFS32A2-100TQC ISSI Standard SRAM, 256KX32, 12ns, CMOS, PQFP100, 14 X 20 MM, TQFP-100

获取价格

AS7C33256PFS32A2-100TQI ISSI Standard SRAM, 256KX32, 12ns, CMOS, PQFP100, 14 X 20 MM, TQFP-100

获取价格

AS7C33256PFS32A2-133BC ISSI SRAM

获取价格

AS7C33256PFS32A2-133BI ISSI SRAM

获取价格