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AS7C25512NTD36A-200TQC PDF预览

AS7C25512NTD36A-200TQC

更新时间: 2024-11-28 04:05:55
品牌 Logo 应用领域
美国芯成 - ISSI 静态存储器
页数 文件大小 规格书
19页 363K
描述
ZBT SRAM, 512KX36, 7.5ns, CMOS, PQFP100, 14 X 20 MM, TQFP-100

AS7C25512NTD36A-200TQC 数据手册

 浏览型号AS7C25512NTD36A-200TQC的Datasheet PDF文件第2页浏览型号AS7C25512NTD36A-200TQC的Datasheet PDF文件第3页浏览型号AS7C25512NTD36A-200TQC的Datasheet PDF文件第4页浏览型号AS7C25512NTD36A-200TQC的Datasheet PDF文件第5页浏览型号AS7C25512NTD36A-200TQC的Datasheet PDF文件第6页浏览型号AS7C25512NTD36A-200TQC的Datasheet PDF文件第7页 
December 2002  
Advance Information  
AS7C25512NTD32A  
AS7C25512NTD36A  
&
TM  
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Features  
• Organization: 524,288 words × 32 or 36 bits  
• NTD architecture for efficient bus operation  
Available in 100-pin TQFP and 165-ball BGA package  
Byte write enables  
™1  
Fast clock speeds to 250 MHz in LVTTL/ LVCMOS  
Fast clock to data access: 2.6/ 2.8/ 3/ 3.4 ns  
Fast OEaccess time: 2.6/ 2.8/ 3/ 3.4 ns  
Fully synchronous operation  
Clock enable for operation hold  
• Multiple chip enables for easy expansion  
• 2.5V core power supply  
Self-timed write cycles  
Flow-through or pipelined mode  
Asynchronous output enable control  
• Interleaved or linear burst modes  
Snooze mode for standby operation  
TM  
1. NTD is a trademark of Alliance Semiconductor Corporation.  
Logic block diagram  
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Selection guide  
-250  
4
-225  
-200  
5
-166  
6
Units  
ns  
Minimum cycle time  
4
Maximum pipelined clock frequency  
Maximum pipelined clock access time  
Maximum operating current  
250  
2.6  
450  
160  
70  
225  
2.8  
425  
150  
70  
200  
3.0  
400  
130  
70  
166  
3.4  
350  
120  
70  
MHz  
ns  
mA  
mA  
mA  
Maximum standby current  
Maximum CMOS standby current (DC)  
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