Datasheet > AS6UA5128-70HFC

AS6UA5128-70HFC

更新时间： 2022-12-01 21:06:40

品牌	Logo	应用领域
ALSC		静态存储器
页数	文件大小	规格书
11页	218K
描述
SRAM

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数据手册

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AS6UA5128-70HFC 数据手册

AS6UA5128

Read cycle (over the operating range)

–55

–70

–100

Parameter

Read cycle time

Symbol

t_RC

Min

–

Max

–

Min

–

Max

–

Min

100

–

Max

–

Unit

Notes

Address access time

t_AA

–

100

–

Chip select (CS) access time

Output enable (OE) access time

Output hold from address change

CS low to output in low Z

CS high to output in high Z

OE low to output in low Z

OE high to output in high Z

Power up time

t_ACS

t_OE

–

t_OH

t_CLZ

t_CHZ

t_OLZ

t_OHZ

t_PU

–

4, 5

–

Power down time

t_PD

–

–S

–

100

Shaded areas indicate preliminary information.

Key to switching waveforms

Rising input

Falling input

Undefined/ don’t care

Read waveform 1 (address controlled)

Address

Previous data valid

Data valid

OUT

Read waveform 2 (CS, OE controlled)

RC1

OHZ

OLZ

ACE

CHZ

OUT

Data valid

CLZ

Supply

current

50%

ALLIANCE SEMICONDUCTOR

7/ 14/ 00

1 2 345 6 7...11

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与AS6UA5128-70HFC相关器件

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