Datasheet > AS4DDR264M72PBGR-5/ET

AS4DDR264M72PBGR-5/ET

更新时间： 2024-11-11 20:29:11

品牌	Logo	应用领域
MICROSS		时钟动态存储器双倍数据速率内存集成电路
页数	文件大小	规格书
31页	1541K
描述
DDR DRAM, 64MX72, 0.6ns, CMOS, PBGA255, 25 X 32 MM, 1.27 MM PITCH, ROHS COMPLIANT, PLASTIC, BGA-255

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iPEM

4.8 Gb SDRAM-DDR2

AS4DDR264M72PBG & MYXDDR264M72

64Mx72 DDR2 SDRAM

iNTEGRATED Plastic Encapsulated Microcircuit

FEATURES

BENEFITS



DDR2 Data rate = 667, 533, 400



Space conscious PBGA deﬁned for easy

Available in Industrial, Enhanced and Military Temp

Packages:

• 255 Plastic Ball Grid Array (PBGA), 25 x 32mm,

1.27mm pitch

SMT manufacturability (1.27mm or

1.0mm pitch)

Reduced part count

Signiﬁcant I/O reduction vs individual

CSP approach



• 208 PBGA, 16 x 22mm, 1.0mm pitch (page 27-28)

Differential data strobe (DQS, DQS#) per byte

Internal, pipelined, double data rate architecture

4n-bit prefetch architecture

DLL for alignment of DQ and DQS transitions with

clock signal



Reduced trace lengths for lower parasitic

capacitance



Suitable for hi-reliability applications

Upgradable to 128M x 72 density



Eight internal banks for concurrent operation

(Per DDR2 SDRAM Die)

Configuration Addressing



Programmable Burst lengths: 4 or 8

Auto Refresh and Self Refresh Modes (I/T Version)

On Die Termination (ODT)

Adjustable data – output drive strength

1.8V ±0.1V power supply and I/O (VCC/VCCQ)

Programmable CAS latency: 3, 4, 5, 6 or 7

Posted CAS additive latency: 0, 1, 2, 3, 4 or 5

Write latency = Read latency - 1* tCK

Organized as 64M x 72 w/ support for x80

Weight: AS4DDR264M72PBG ~ 3.5 grams typical

Parameter

64 Meg x 72

8 Meg x 16 x 8 Banks

Configuration

Refresh Count

Row Address

Bank Address

Column Address

A0‐A12 (8k)

BA0‐BA2 (8)

A0‐A9 (1K)

NOTE: Self Refresh Mode available on Industrial and Enhanced temp. only

FUNCTIONAL BLOCK DIAGRAM

Ax, BA0-1

ODT

VRef

VCC

VCCQ

VSS

VSSQ

VCCL

VSSDL

DQ64-79

CS0\

CS1\

CS2\

CS3\

CS4\

UDMx, LDMx

UDSQx,UDSQx\

LDSQx, LDSQx\

RASx\,CASx\,WEx\

CKx,CKx\,CKEx

DQ16-31

DQ0-15

DQ32-47

DQ48-63

Micross Components reserves the right to change products or speciﬁcations without notice.

AS4DDR264M72PBG & MYXDDR264M72

Rev. 2.4 12/12

12 3 4 5 6 7...31

中文翻译

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与AS4DDR264M72PBGR-5/ET相关器件

型号	品牌	获取价格	描述	数据表
AS4DDR264M72PBGR-5/IT	AUSTIN	获取价格	64Mx72 DDR2 SDRAM iNTEGRATED Plastic Encapsulated Microcircuit
AS4DDR264M72PBGR-5/XT	MICROSS	获取价格	DDR DRAM, 64MX72, 0.6ns, CMOS, PBGA255, 25 X 32 MM, 1.27 MM PITCH, ROHS COMPLIANT, PLASTIC
AS4DDR264M72PBGR-5/XT	AUSTIN	获取价格	64Mx72 DDR2 SDRAM iNTEGRATED Plastic Encapsulated Microcircuit
AS4DDR32M16	AUSTIN	获取价格	8 Meg x 16 x 4 Banks Double Data Rate SDRAM COTS, Plastic Encapsulated Microcircuit
AS4DDR32M16DG-6/IT	MICROSS	获取价格	DDR DRAM, 32MX16, 0.7ns, CMOS, PDSO66, 0.400 INCH, 0.65 MM PITCH, PLASTIC, TSOP2-66
AS4DDR32M16DG-75/ET	MICROSS	获取价格	DDR DRAM, 32MX16, 0.75ns, CMOS, PDSO66, 0.400 INCH, 0.65 MM PITCH, PLASTIC, TSOP2-66
AS4DDR32M16DG-75/IT	MICROSS	获取价格	DDR DRAM, 32MX16, 0.75ns, CMOS, PDSO66, 0.400 INCH, 0.65 MM PITCH, PLASTIC, TSOP2-66
AS4DDR32M16DG-75/XT	MICROSS	获取价格	DDR DRAM, 32MX16, 0.75ns, CMOS, PDSO66, 0.400 INCH, 0.65 MM PITCH, PLASTIC, TSOP2-66
AS4DDR32M16DG-8/ET	MICROSS	获取价格	DDR DRAM, 32MX16, 0.8ns, CMOS, PDSO66, 0.400 INCH, 0.65 MM PITCH, PLASTIC, TSOP2-66
AS4DDR32M16DG-8/IT	MICROSS	获取价格	DDR DRAM, 32MX16, 0.8ns, CMOS, PDSO66, 0.400 INCH, 0.65 MM PITCH, PLASTIC, TSOP2-66

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