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AS4DDR232M72APBGR-5 PDF预览

AS4DDR232M72APBGR-5

更新时间: 2024-11-12 00:59:35
品牌 Logo 应用领域
MICROSS /
页数 文件大小 规格书
28页 1308K
描述
4-bit prefetch architecture

AS4DDR232M72APBGR-5 数据手册

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iPEM  
2.4 Gb SDRAM-DDR2  
AS4DDR232M72APBG  
32Mx72 DDR2 SDRAM  
iNTEGRATED Plastic Encapsulated Microcircuit  
FEATURES  
BENEFITS  
ꢀDDR2 Data rate = 667, 533, 400  
ꢀAvailable in Industrial, Enhanced and Military Temp  
ꢀPackage:  
ꢀ SPACEꢀconsciousꢀPBGAꢀdefinedꢀforꢀeasy  
SMT manufacturability (50 mil ball pitch)  
ꢀReduced part count  
ꢀ ꢀ •ꢀ 255 Plastic Ball Grid Array (PBGA), 25 x 32mm  
ꢀ ꢀ •ꢀ 1.27mm pitch  
ꢀDifferential data strobe (DQS, DQS#) per byte  
ꢀInternal, pipelined, double data rate architecture  
ꢀ4-bit prefetch architecture  
ꢀDLL for alignment of DQ and DQS transitions with  
clock signal  
ꢀFour internal banks for concurrent operation  
ꢀꢀ(Per DDR2 SDRAM Die)  
ꢀ47% I/O reduction vs Individual CSP approach  
ꢀReduced trace lengths for lower parasitic  
capacitance  
ꢀSuitable for hi-reliability applications  
ꢀUpgradable to 64M x 72 density  
(consult factory for info on  
AS4DDR264M72PBG)  
ꢀProgrammable Burst lengths: 4 or 8  
ꢀAuto Refresh and Self Refresh Modes  
ꢀOn Die Termination (ODT)  
Configuration Addressing  
ꢀAdjustable data – output drive strength  
ꢀ1.8V ±0.1V power supply and I/O (VCC/VCCQ)  
ꢀProgrammable CAS latency: 3, 4, 5, or 6  
ꢀPosted CAS additive latency: 0, 1, 2, 3 or 4  
ꢀWrite latency = Read latency - 1* tCK  
ꢀOrganized as 32M x 72 w/ support for x80  
ꢀWeight: AS4DDR232M72APBG ~ 3.5 grams typical  
Parameter  
32 Meg x 72  
8 Meg x 16 x 4 Banks  
8K  
8K (A0A12)  
4 (BA0BA1)  
1K (A0A9)  
Configuration  
Refresh Count  
Row Address  
Bank Address  
Column Address  
NOTE: Self Refresh Mode available on Industrial and Enhanced temp. only  
FUNCTIONAL BLOCK DIAGRAM  
Ax, BA0-1  
ODT  
VRef  
VCC  
VCCQ  
VSS  
VSSQ  
VCCL  
VCCL  
VCCL  
VCCL  
VCCL  
VSSDL  
VSSDL  
VSSDL  
VSSDL  
VSSDL  
A
B
C
D
2
2
2
2
2
2
2
2
DQ64-79  
CS0\  
CS1\  
CS2\  
CS3\  
2
2
2
2
2
3
3
3
3
2
3
3
3
3
CS4\  
2
UDMx, LDMx  
UDSQx,UDSQx\  
LDSQx, LDSQx\  
RASx\,CASx\,WEx\  
CKx,CKx\,CKEx  
3
3
C
B
D
DQ16-31  
A
DQ0-15  
DQ32-47  
DQ48-63  
AS4DDR232M72APBG  
Rev. 1.1 12/12  
Micross Components reserves the right to change products or specifications without notice.  
1

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