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AS197-306 PDF预览

AS197-306

更新时间: 2024-11-06 23:31:19
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描述
AS197-306:PHEMT GaAs IC High Power SP2T and SP3T S|DC-6 GHz Plastic Packaged and Chip|SPST

AS197-306 数据手册

 浏览型号AS197-306的Datasheet PDF文件第2页 
GaAs FETs as Control Devices  
APN2015  
-5 V  
Gallium arsenide MESFETs are being used in RF control  
device applications as switches and attenuators.They are  
very easily adapted to monolithic circuit form, dissipate  
essentially no power and can easily be designed into  
broadband circuits.  
5 k  
Source  
Gate  
Drain  
N
SI  
The RF signal flows from source to drain, while the RF  
isolated gate is the voltage control. The high impedance  
“off state” is attained by applying a DC voltage on the gate  
more negative than the “pinch-off” voltage (V ). In this  
P
condition the source-drain channel is “pinched off.The  
capacitance is typically 0.25 pF per mm of gate  
periphery (see Figure 1A). The “on” state occurs when  
zero DC bias is applied to the gate (see Figure 1B). The  
channel from source to drain is “open” and represents a  
2.5–3.5 resistance per mm of gate periphery.  
Figure 1A. MESFET Control Device in  
High Impedance State (“Off” State)  
0 V  
5 kΩ  
Gate  
A configuration of FETs used in series and shunt normally  
produce the optimum switch or attenuator performance in  
monolithic circuits (see Figure 2).The only DC current that  
flows is the leakage of the gate-source and gate-drain  
reverse biased junctions (when negative voltage is applied  
to gate). Typical current drain is < 25 µA @ -5 V. This  
leakage is a function of the wafer fabrication process, the  
device periphery, and magnitude of applied voltage. For  
isolation of gate voltage control, 2.5–5 kresistor is  
incorporated monolithically in the gate. Since no further  
external bias circuitry is required, the switch is inherently  
broadband.  
Source  
Drain  
N
SI  
Figure 1B. MESFET Control Device in  
Low Impedance State (“On” State)  
Voltage variable attenuators (VVAs) use the channel  
resistance of the FET as the actual resistance of the circuit  
components. The resistance is a nonlinear relationship  
with control voltage as shown in Figure 4 (FET with a  
“pinch-off” voltage of 1.5 V). Figure 5 shows a TEE VVA  
that uses two series FETs and one shunt FET.  
The power handling of the switches is primarily limited by  
the current handling capability, which is related to the IDSS  
of the FET. The IDSS is a function of the gate periphery  
which then determines the source-drain capacitance.  
The input series FET in switches have a nominal 1 dB  
compression of 1 W/mm.  
Digital attenuators use FETs configured as “T” or “PI” pads  
to achieve a given attenuation value (Figure 3). For the low  
loss state V is set to 0 V and V is set to -5 V. For the  
2
1
attenuation state V is set to -5 V and V is set to 0 V.  
2
1
Typically digital attenuators are composed of multiple bit  
values (e.g. 2, 4, 8, 16 dB AD220-25).  
Skyworks Solutions, Inc. [781] 376-3000 Fax [781] 376-3100 Email sales@skyworksinc.com www.skyworksinc.com  
1
Specifications subject to change without notice. 9/03A  

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