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AMIS-52100-M

更新时间： 2024-02-27 13:51:41

品牌	Logo	应用领域
AMI		光电二极管时钟
页数	文件大小	规格书
26页	1576K
描述
Transceiver with Clock and Data Recovery

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技术参数
数据手册

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AMIS-52100-M 技术参数

生命周期：	Active	Reach Compliance Code：	compliant
风险等级：	5.7	Is Samacsys：	N
JESD-30 代码：	R-PDSO-G20	端子数量：	20
最高工作温度：	50 °C	最低工作温度：
封装主体材料：	PLASTIC/EPOXY	封装代码：	SSOP
封装等效代码：	SSOP20,.3	封装形状：	RECTANGULAR
封装形式：	SMALL OUTLINE, SHRINK PITCH	电源：	3 V
认证状态：	Not Qualified	子类别：	Other Telecom ICs
最大压摆率：	25 mA	标称供电电压：	3 V
表面贴装：	YES	温度等级：	COMMERCIAL
端子形式：	GULL WING	端子节距：	0.635 mm
端子位置：	DUAL	Base Number Matches：	1

AMIS-52100-M 数据手册

AMIS-52100 Low-Power Transceiver with Clock and Data Recovery

Data Sheet

Table 27: Data and Clock Recovery Control Registers

Data and Clock Recovery Associated Registers

0x07

0x08

0x09

0x0d

Name

FWORD LSB

FWORD

FWORD MSB

DATA MUX

Bits

All

States

Comments

Sets the initial internal clock frequency for the clock and data

recovery circuits

TX/RX normal signals

Recovered data on TX/RX

Normal CLKOUT signals

Recovered CLOCK output on CLKOUT

Filter coefficient gain is 1

Filter coefficient gain is 2

Filter coefficient gain is 4

Filter coefficient gain is 8

Filter coefficient gain is 16

Filter coefficient gain is 32

Filter coefficient gain is 64

Filter coefficient gain is 128

Filter coefficient gain is 1

Filter coefficient gain is 2

Filter coefficient gain is 4

Filter coefficient gain is 8

Filter coefficient gain is 16

Filter coefficient gain is 32

Filter coefficient gain is 64

Filter coefficient gain is 128

Filter coefficient gain is 0.125

Filter coefficient gain is 0.250

Filter coefficient gain is 0.500

Filter coefficient gain is 1.000

Filter coefficient gain is 2

Filter coefficient gain is 4

Filter coefficient gain is 8

Filter coefficient gain is 16

Sample frequency divider is 2

Sample frequency divider is 4

Sample frequency divider is 8

Sample frequency divider is 16

Sample frequency divider is 20

Sample frequency divider is 32

Sample frequency divider is 40

Sample frequency divider is 48

StopCheck bits: disabled

StopCheck bits: 2

CLKMUX

K₀

0x10

0x11

0x12

0,1,2

000

001

010

011

100

101

110

111

000

001

010

011

100

101

110

111

000

001

010

011

100

101

110

111

000

001

010

011

100

101

110

111

K₁

4,5,6

0,1,2

4,5,6

K₂

FsDIV

STOP CHECK

LOOPCLAMP

0,1

2,3

StopCheck bits: 4

StopCheck bits: 8

Loop clamp value is: +-BaudClk/8

Loop clamp value is: +-BaudClk/16

Loop clamp value is: +-BaudClk/32

Loop clamp value is: +-BaudClk/64

Phase alignment enabled

Phase alignment disabled

CDR reset disabled

FREERUN

CRD RESET

CDR reset enabled

AUTO/MANUAL

RESET

SAMPLE

WINDOW

POR reset (auto)

CDR reset enabled (manual)

Sampling starts with bit start edge

Sampling centered around bit center

The clock and data recovery function requires that the receiver be able to recover the data from the incoming RF signal. There is a

method to test the clock and data recovery function without having to set the receiver up to receive data. This is a test mode that allows

an input data stream (square wave at 1/2 the data rate) to be input on the RSSI pin and recovered clock will appear on the CLKOUT pin

AMI Semiconductor – Rev 4.0, Mar. 06 – M-20535-004

www.amis.com

1...18 19 202122 23 24...26

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