AMC80
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SBOS559 –MAY 2011
PIN DESCRIPTIONS
PIN
NAME
NO.
I/O
TYPE
DESCRIPTION
Interrupt input pin. An active low input that extends the INT_IN signal to the INT output
of the AMC80.
1
INT_IN
Input
Digital
2
3
4
5
SDA
SCL
I/O
I/O
Digital Serial bus data line for SMBus, open-drain; requires pull-up resistor.
Digital Serial bus clock line for SMBus, open-drain; requires pull-up resistor.
Digital Fan tachometer input pin
FAN1
FAN2
Input
Input
Digital Fan tachometer input pin
Board temperature interrupt pin. BTI is driven by the over-temperature shutdown (OS)
Digital outputs of the additional temperature sensors. This pin has an internal 10-kΩ pull-up
resistor.
6
BTI
Input
General-purpose input pin (chassis interrupt). An active high interrupt input pin to latch
a chassis interrupt event.
7
GPI(CI)
Input
Digital
8
9
DGND
V+
Power Analog Digital ground.
Power Analog Positive supply voltage (3V to 5.5V).
Non-maskable interrupt (active high, PMOS, open-drain) or interrupt request (active
Digital low, NMOS, open-drain) pin. The INT pin becomes active when INT_IN, BTI, or GPI
10
11
INT
Output
Output
interrupts.
General-purpose output pin. GPO is an active low, NMOS, open-drain output. This pin
Digital is intended to drive an external power PMOS for software power control or to control
power to a cooling fan.
GPO
This pin is an active-low input that enables NAND tree board-level connectivity testing.
Digital
12
13
14
NTEST_IN/RESET_IN
RST_OUT/OS
AGND
Input
The AMC80 resets to its power-on state when NAND tree connectivity is enabled.
This pin is an NMOS open-drain output. RST_OUT provides a master reset to devices
connected to this line. OS is dedicated to the temperature reading alarm.
Output
Digital
Analog ground. This pin must be tied to a low-noise analog ground plane for optimum
performance.
Power Analog
15
16
17
18
19
20
21
CH6
CH5
CH4
CH3
CH2
CH1
CH0
Input
Input
Input
Input
Input
Input
Input
Analog Analog input channel 6
Analog Analog input channel 5
Analog Analog input channel 4
Analog Analog input channel 3
Analog Analog input channel 2
Analog Analog input channel 1
Analog Analog input channel 0
The lowest order bit of the serial bus address. During a NAND tree test for ATE
board-level connectivity, this pin functions as an output.
22
A0/NTEST_OUT
I/O
Digital
23
24
A1
A2
Input
Input
Digital Address pin 1
Digital Address pin 2
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