FINAL
Am79C30A/32A
Digital Subscriber Controller™ (DSC™) Circuit
DISTINCTIVE CHARACTERISTICS
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Combines CCITT I.430 S/T-Interface Transceiver,
D-Channel LAPD Processor, Audio
Certified protocol software support available
CMOS technology, TTL compatible
D-channel processing capability
— Flag generation/detection
Processor (DSC device only), and IOM-2
Interface in a single chip
Special operating modes allow realization of
CCITT I.430 power-compliant terminal
equipment
— CRC generation/checking
— Zero insertion/deletion
— Four 2-byte address detectors
— 32-byte receive and 16-byte transmit FIFOs
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S- or T-Interface Transceiver
— Level 1 Physical Layer Controller
— Supports point-to-point, short and extended
passive bus configurations
— Provides multiframe support
BLOCK DIAGRAM
SBP/IOM-2 Interface
SBIN
SCLK BCL/CH2STRB*
CAP1
CAP2
HSW
SBIOUT
SFS
AINA
LOUT1
LOUT2
LIN1
Main Audio
Processor (MAP)
AREF
AINB
EAR1
EAR2
LS1
S/T Line
Interface Unit
(LIU)
Peripheral Port
(PP)
LIN2
(Am79C30A
Only)
Bd Be Bf
LS2
D
Channel
B1
B2
Ba
B-channel Multiplexer
(MUX)
D-Channel Data
Link Controller
(DLC)
XTAL1
XTAL2
Oscillator
(OSC)
Bb
Bc
MCLK
D
Channel
CS
WR
RD
Microprocessor Interface
(MUX)
RESET
D7 D6 D5 D4 D3 D2 D1 D0 INT A2 A1 A0
Microprocessor Interface
09893H-1
This document contains information on a product under development at Advanced Micro Devices. The information
is intended to help you evaluate this product. AMD reserves the right to change or discontinue work on this proposed
product without notice.
Publication# 09893 Rev: H Amendment/0
Issue Date: December 1998