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AM3517_16

更新时间： 2024-12-02 02:58:35
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德州仪器 - TI /
页数 文件大小 规格书
184页 2065K
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AM3517, AM3505 Sitara™ Processors

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AM3517_16 数据手册

 浏览型号AM3517_16的Datasheet PDF文件第2页浏览型号AM3517_16的Datasheet PDF文件第3页浏览型号AM3517_16的Datasheet PDF文件第4页浏览型号AM3517_16的Datasheet PDF文件第5页浏览型号AM3517_16的Datasheet PDF文件第6页浏览型号AM3517_16的Datasheet PDF文件第7页 
AM3517/05 ARM Microprocessor  
www.ti.com  
SPRS550–OCTOBER 2009  
1 AM3517/05 ARM Microprocessor  
1.1 Features  
•
•
HDQ/1-Wire Interface  
•
AM3517/05 ARM Microprocessor:  
–
Software Compatible with OMAPTM  
Processors**  
3
4 UARTs (One with Infrared Data  
Association [IrDA] and Consumer  
Infrared [CIR] Modes)  
3 Master/Slave High-Speed  
Inter-Integrated Circuit (I2C) Controllers  
12 32-bit General Purpose Timers  
1 32-bit Watchdog Timer  
1 32-bit 32-kHz Sync Timer  
Up to 186 General-Purpose I/O (GPIO)  
Pins  
–
MPU Subsystem  
•
•
•
500-MHz ARM Cortex-A8 Core  
NEON SIMD Coprocessor and Vector  
floating point (FP) co-processor  
•
•
•
•
–
Memory Interfaces:  
•
16/32- bit DDR2 Interface with 1 GByte  
total addressable space  
•
General Purpose Memory Interface  
supporting 16-bit Wide Multiplexed  
Address/Data bus  
•
Display subsystem  
–
–
–
–
Parallel Digital Output  
Up to 24-Bit RGB  
Supports Up to 2 LCD Panels  
Support for Remote Frame Buffer Interface  
(RFBI) LCD Panels  
Two 10-bit Digital-to-Analog Converters  
(DACs) Supporting  
Composite NTSC/PAL Video  
Luma/Chroma Separate Video (S-Video)  
Serial Digital Output  
Rotation 90-, 180-, and 270-degrees  
Resize Images From 1/4x to 8x  
Color Space Converter  
•
•
64 K-Byte shared SRAM  
3 Removable Removable Media  
Interfaces [MMC/SD/SDIO]  
–
–
–
–
IO Voltage: DDR2 IOs: 1.8V; Other IOs: 1.8V  
and 3.3V,1.2V Core Voltage  
Commerial and Industrial temperature  
grade*  
16-bit Video Input Port capable of capturing  
HD video  
491-pin sBGA package (17x17, .65 mm  
pitch)  
–
–
–
–
–
–
–
–
–
–
HD resolution Display Subsystem  
Serial Communication  
8-bit Alpha Blending  
•
•
•
High-End CAN Controller  
10/100 Mbit Ethernet MAC  
USB OTG subsystem with standard  
DP/DM interface[HS/FS/LS]  
•
Video Processing Front End (VPFE) 16-bit  
Video Input Port  
–
–
–
–
RAW Data Interface  
75-MHz Maximum Pixel Clock  
Supports REC656/CCIR656 Standard  
Supports YCbCr422 Format (8-bit or 16-bit  
With Discrete Horizontal and Vertical Sync  
Signals)  
Generates Optical Black Clamping Signals  
Built-in Digital Clamping and Black Level  
Compensation  
10-bit to 8-bit A-law Compression Hardware  
Supports up to 16K Pixels (Image Size) in  
Horizontal and Vertical Directions  
•
Multiport USB Host Subsystem  
[HS/FS/LS]  
–
12-/8-Pin ULPI Interface or 6-/4-/3-Pin  
•
•
Four Master/Slave Multichannel Serial  
Port Interface (McSPI) Ports  
Five Multichannel Buffered Serial Ports  
–
–
–
–
–
512-Byte Transmit/Receive Buffer  
(McBSP1/3/4/5)  
5K-Byte Transmit/Receive Buffer  
(McBSP2)  
SIDETONE Core Support (McBSP2  
and 3 Only) For Filter, Gain, and Mix  
Operations  
–
–
•
•
System Direct Memory Access (sDMA)  
Controller (32 Logical Channels With  
Configurable Priority)  
–
–
128-Channel Transmit/Receive Mode  
Direct Interface to I2S and PCM  
Device and TDM Buses  
Comprehensive Power, Reset and Clock  
Management  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas  
Instruments semiconductor products and disclaimers thereto appears at the end of this document.  
POWERVR SGX is a trademark of Imagination Technologies Ltd.  
All other trademarks are the property of their respective owners.  
PRODUCT PREVIEW information concerns products in the  
formative or design phase of development. Characteristic data and  
other specifications are design goals. Texas Instruments reserves  
the right to change or discontinue these products without notice.  
Copyright © 2009, Texas Instruments Incorporated  
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