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AM29LV004T-120EEB PDF预览

AM29LV004T-120EEB

更新时间: 2024-09-19 05:26:39
品牌 Logo 应用领域
超微 - AMD 闪存
页数 文件大小 规格书
36页 428K
描述
4 Megabit (512 K x 8-Bit) CMOS 3.0 Volt-only Boot Sector Flash Memory

AM29LV004T-120EEB 技术参数

是否无铅: 含铅是否Rohs认证: 不符合
生命周期:Obsolete零件包装代码:TSOP
包装说明:TSOP-40针数:40
Reach Compliance Code:unknownECCN代码:3A001.A.2.C
HTS代码:8542.32.00.51风险等级:5.73
最长访问时间:120 ns其他特性:AUTOMATIC WRITE
启动块:TOP命令用户界面:YES
数据轮询:YES耐久性:100000 Write/Erase Cycles
JESD-30 代码:R-PDSO-G40JESD-609代码:e0
长度:18.4 mm内存密度:4194304 bit
内存集成电路类型:FLASH内存宽度:8
功能数量:1部门数/规模:1,2,1,7
端子数量:40字数:524288 words
字数代码:512000工作模式:ASYNCHRONOUS
最高工作温度:125 °C最低工作温度:-55 °C
组织:512KX8输出特性:3-STATE
封装主体材料:PLASTIC/EPOXY封装代码:TSOP1
封装等效代码:TSSOP40,.8,20封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, THIN PROFILE并行/串行:PARALLEL
峰值回流温度(摄氏度):NOT SPECIFIED电源:3/3.3 V
编程电压:3 V认证状态:Not Qualified
就绪/忙碌:YES座面最大高度:1.2 mm
部门规模:16K,8K,32K,64K最大待机电流:0.000005 A
子类别:Flash Memories最大压摆率:0.03 mA
最大供电电压 (Vsup):3.6 V最小供电电压 (Vsup):2.7 V
标称供电电压 (Vsup):3.3 V表面贴装:YES
技术:CMOS温度等级:MILITARY
端子面层:Tin/Lead (Sn/Pb)端子形式:GULL WING
端子节距:0.5 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED切换位:YES
类型:NOR TYPE宽度:10 mm
Base Number Matches:1

AM29LV004T-120EEB 数据手册

 浏览型号AM29LV004T-120EEB的Datasheet PDF文件第2页浏览型号AM29LV004T-120EEB的Datasheet PDF文件第3页浏览型号AM29LV004T-120EEB的Datasheet PDF文件第4页浏览型号AM29LV004T-120EEB的Datasheet PDF文件第5页浏览型号AM29LV004T-120EEB的Datasheet PDF文件第6页浏览型号AM29LV004T-120EEB的Datasheet PDF文件第7页 
PRELIMINARY  
Am29LV004  
4 Megabit (512 K x 8-Bit)  
CMOS 3.0 Volt-only Boot Sector Flash Memory  
DISTINCTIVE CHARACTERISTICS  
Single power supply operation  
Top or bottom boot block configurations  
available  
— Full voltage range: 2.7 to 3.6 volt read and write  
operations for battery-powered applications  
Embedded Algorithms  
— Regulated voltage range: 3.0 to 3.6 volt read  
and write operations and for compatibility with  
high performance 3.3 volt microprocessors  
— Embedded Erase algorithm automatically  
preprograms and erases the entire chip or any  
combination of designated sectors  
High performance  
— Embedded Program algorithm automatically  
writes and verifies data at specified addresses  
— Full voltage range: access times as fast as 100  
ns  
Typical 1,000,000 write cycles per sector  
— Regulated voltage range: access times as fast  
as 90 ns  
(100,000 cycles minimum guaranteed)  
Package option  
Ultra low power consumption (typical values at  
— 40-pin TSOP  
5 MHz)  
Compatibility with JEDEC standards  
— 200 nA Automatic Sleep mode current  
— 200 nA standby mode current  
— 10 mA read current  
— Pinout and software compatible with single-  
power supply Flash  
— Superior inadvertent write protection  
— 20 mA program/erase current  
Data# Polling and toggle bits  
Flexible sector architecture  
— Provides a software method of detecting  
program or erase operation completion  
— One 16 Kbyte, two 8 Kbyte, one 32 Kbyte, and  
seven 64 Kbyte sectors  
Ready/Busy# pin (RY/BY#)  
— Supports full chip erase  
— Provides a hardware method of detecting  
program or erase cycle completion  
— Sector Protection features:  
A hardware method of locking a sector to  
prevent any program or erase operations within  
that sector  
Erase Suspend/Erase Resume  
— Suspends an erase operation to read data from,  
or program data to, a sector that is not being  
erased, then resumes the erase operation  
Sectors can be locked via programming  
equipment  
Hardware reset pin (RESET#)  
Temporary Sector Unprotect feature allows code  
changes in previously locked sectors  
— Hardware method to reset the device to reading  
array data  
This document contains information on a product under development at Advanced Micro Devices. The information  
is intended to help you evaluate this product. AMD reserves the right to change or discontinue work on this proposed  
product without notice.  
Publication# 20510 Rev: D Amendment/+1  
Issue Date: March 1998  
Refer to AMD’s Website (www.amd.com) for the latest information.  

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