Datasheet > AM27C64-200JC

AM27C64-200JC

更新时间： 2024-11-13 22:35:03

品牌	Logo	应用领域
超微 - AMD		可编程只读存储器电动程控只读存储器
页数	文件大小	规格书
12页	165K
描述
64 Kilobit (8 K x 8-Bit) CMOS EPROM

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中文翻译

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数据手册

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AM27C64-200JC 数据手册

FINAL

Am27C64

64 Kilobit (8 K x 8-Bit) CMOS EPROM

DISTINCTIVE CHARACTERISTICS

■ Fast access time

■ Latch-up protected to 100 mA from –1 V to

V_CC+ 1 V

— Speed options as fast as 45 ns

■ Low power consumption

■ High noise immunity

■ Versatile features for simple interfacing

— Both CMOS and TTL input/output compatibility

— Two line control functions

— 20 µA typical CMOS standby current

■ JEDEC-approved pinout

■ Single +5 V power supply

■ Standard 28-pin DIP, PDIP, and 32-pin PLCC

■ ±10% power supply tolerance standard

■ 100% Flashrite™ programming

— Typical programming time of 1 second

packages

GENERAL DESCRIPTION

The Am27C64 is a 64-Kbit, ultraviolet erasable pro-

grammable read-only memory. It is organized as 8K

words by 8 bits per word, operates from a single +5 V

supply, has a static standby mode, and features fast

single address location programming. Products are

available in windowed ceramic DIP packages, as well

as plastic one time programmable (OTP) PDIP and

PLCC packages.

thus eliminating bus contention in a multiple bus micro-

processor system.

AMD’s CMOS process technology provides high

speed, low power, and high noise immunity. Typical

power consumption is only 80 mW in active mode, and

100 µW in standby mode.

All signals are TTL levels, including programming sig-

nals. Bit locations may be programmed singly, in

blocks, or at random. The device supports AMD’s

Flashrite programming algorithm (100 µs pulses), re-

sulting in a typical programming time of 1 second.

Data can be typically accessed in less than 45 ns, al-

lowing high-performance microprocessors to operate

without any WAIT states. The device offers separate

Output Enable (OE#) and Chip Enable (CE#) controls,

BLOCK DIAGRAM

Data Outputs

DQ0–DQ7

OE#

CE#

Output Enable

Chip Enable

and

Output

Buffers

Prog Logic

PGM#

Gating

Decoder

A0–A12

Address

Inputs

65,538

Bit Cell

Matrix

Decoder

11419E-1

Publication# 11419 Rev: E Amendment/0

Issue Date: May 1998

12 3 4 5 6 7...12

中文翻译

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与AM27C64-200JC相关器件

型号	品牌	获取价格	描述	数据表
AM27C64-200JE	AMD	获取价格	64 Kilobit (8 K x 8-Bit) CMOS EPROM
AM27C64-200JI	AMD	获取价格	64 Kilobit (8 K x 8-Bit) CMOS EPROM
AM27C64-200LCB	ETC	获取价格	x8 EPROM
AM27C64-200LEB	ETC	获取价格	x8 EPROM
AM27C64-200LIB	ETC	获取价格	x8 EPROM
AM27C64-200PC	AMD	获取价格	64 Kilobit (8 K x 8-Bit) CMOS EPROM
AM27C64-200PC	SPANSION	获取价格	OTP ROM, 8KX8, 200ns, CMOS, PDIP28, PLASTIC, DIP-28
AM27C64-200PE	AMD	获取价格	64 Kilobit (8 K x 8-Bit) CMOS EPROM
AM27C64-200PI	AMD	获取价格	64 Kilobit (8 K x 8-Bit) CMOS EPROM
AM27C64-200PI	SPANSION	获取价格	OTP ROM, 8KX8, 200ns, CMOS, PDIP28, PLASTIC, DIP-28