Datasheet > AK68512D/3.3-10

AK68512D/3.3-10

更新时间： 2024-02-25 10:07:41

品牌	Logo	应用领域
ACCUTEK		静态存储器
页数	文件大小	规格书
2页	85K
描述
SRAM

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AK68512D/3.3-10 技术参数

生命周期：	Contact Manufacturer	包装说明：	,
Reach Compliance Code：	compliant	风险等级：	5.84

AK68512D/3.3-10 数据手册

Accutek

Microcircuit

Corporation

AK68512D

524,288 x 8 Bit CMOS

Static Random Access Memory

DESCRIPTION

The Accutek AK68512D high density memory module is a static

random access memory organized in 512K x 8 bit words. The as-

sembly consists of two medium speed 128K x 8 SRAMs in thin

TSOP packages and a CMOS decoder logic IC mounted on the top

side and two medium speed 128K x 8 SRAMs in thin TSOP pack-

ages mounted on the bottom surfaces of a printed circuit board.

The module is supplied in a 600 mil wide,32 pin DIP (Dual In-Line

Package) configuration. This pinout is completely compatible with

forthcoming industry standard monolithic designs. These modules

are intended for use in applications where limited board space dic-

tates compact module designs.

The operation of the AK68512D is identical to standard monolithic 8

bit word wide SRAMs.

The AK68512D offers the features of low power and medium speed

by using CMOS devices and makes high density mounting possible

with no surface mount technology.

FEATURES

· 524,288 x 8 bit organization

ELECTRICAL SPECIFICATIONS

· Fast access time: 85 - 120 nSEC

Timing diagrams and basic electrical characteristics are those of

the standard 128K x 8 SRAMs used to construct these modules.

Accutek’s module design allows the flexibility of selecting indus-

try-compatible 128K x 8 SRAMs from any of a number of semicon-

ductor manufacturers.

· Completely static RAM, no clock or timing strobe required

· Inputs and outputs TTL compatible

· Conventional 600 mil wide SIP package with industry

compatible pinout

· Single 5 volt power supply - AK68512D

· Single 3.3 volt power supply - AK68512D/3.3

· Operating free air temperature 0⁰to 70⁰C

PIN NOMENCLATURE

PIN ASSIGNMENT

DQ₁- DQ₈

A₀- A₁₈

Data In/Data Out

Adress Inputs

Chip Enable

Write Enable

5v Supply

A₁₈

A₁₆

A₁₄

A₁₂

A₇

A₆

A₅

A₄

A₃

A₂

A₁

A₀

DQ₁

DQ₂

DQ₃

V_SS

V_CC

A₁₅

30 A₁₇

A₁₃

A₈

A₉

A₁₁

A₁₀

DQ₈

DQ₇

DQ₆

DQ₅

DQ₄

Vcc

Vss

Ground

Output Enable

TIMING OPTIONS

70 nSEC Access Time

85 nSEC Access Time

100 nSEC Access Time

120 nSEC Access Time

Top View

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