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AK58256ASN-60 PDF预览

AK58256ASN-60

更新时间: 2024-11-07 15:27:47
品牌 Logo 应用领域
ACCUTEK 动态存储器
页数 文件大小 规格书
2页 82K
描述
DRAM

AK58256ASN-60 技术参数

生命周期:Contact Manufacturer包装说明:,
Reach Compliance Code:compliant风险等级:5.75
Base Number Matches:1

AK58256ASN-60 数据手册

 浏览型号AK58256ASN-60的Datasheet PDF文件第2页 
Accutek  
Microcircuit  
Corporation  
AK58256AG / AK58256AS  
262,144 x 8 bit CMOS  
Dynamic Random Access Memory  
DESCRIPTION  
Front View  
30-Pin SIM  
The Accutek AK58256AG/AS high density memory module is a  
random access memory organized in 256K x 8 bit words. The  
assembly consists of two 256K x 4 DRAMs in surface mount  
packages mounted to the front side of a printed circuit board.  
The module can be configured as a leadless 30 pad SIM or a  
leaded 30 pin SIP. This packaging approach provides a better  
than 6 to 1 density increase over standard DIP packaging.  
+
+
30  
1
30-Pin SIP  
The operation of the AK58256 is identical to two 256K x 4  
DRAMs. The data input/output is brought out separately for  
each 256K x 4 device, with common RAS, CAS and WE control.  
The OE pins are tied to Vss which dictates the use of early-write  
cycles to prevent contention of D and Q. Since the Write-Enable  
(WE) signal must always go low before CAS in a write cycle,  
Read-Write and Read-Modify-Write operation is not possible.  
+
+
1
FEATURES  
· Power:  
· 262,144 x 8 bit organization  
.99 Watt Max Active (60 nS)  
· Optional 30 Pad leadless SIM (Single In-Line Module) or 30  
Pin leaded SIP (Single In-Line Package)  
.88 Watt Max Active (70 nS)  
.77 Watt Max Active (80 nS)  
.65 Watt Max Active (100 nS)  
11 mWatt standby (max)  
· JEDEC standard pinout  
· Common CAS, RAS and WE control for eight DQ lines  
· Separate CAS control for one separate pair of D and Q lines  
· 1024 refresh cycles/16ms, A0 to A8  
· Operating free air temperature: 00 to 700C  
· Upward compatible with AK581024, AK584096 and  
AK5816384  
· Functionally and Pin compatible with AK48256  
· Available with access times of 60 to 100 nS  
PIN NOMENCLATURE  
PIN ASSIGNMENT  
FUNCTIONAL DIAGRAM  
PIN #  
1
SYMBOL  
Vcc  
CAS  
DQ1  
A0  
PIN #  
SYMBOL  
DQ5  
A8  
DQ1 - DQ8  
A0 - A8  
CAS  
Data In / Data Out  
16  
17  
18  
19  
20  
21  
22  
23  
24  
25  
26  
27  
28  
29  
30  
Address Inputs  
Column Address Strobe  
Row Address Strobe  
Write Enable  
2
3
NC  
A0 - A8  
+
A0 - A8  
RAS  
CAS  
WE  
4
NC  
RAS  
RAS  
CAS  
WE  
+
+
+
*
*
*
5
A1  
DQ6  
WE  
Vss  
DQ7  
NC  
WE  
6
DQ2  
A2  
DQ1  
DQ2  
DQ3  
DQ4  
DQ1 +  
*
7
Vcc  
5v Supply  
DQ2  
DQ3  
DQ4  
+
+
+
*
*
*
8
A3  
Vss  
Ground  
OE  
*
9
Vss  
DQ3  
A4  
NC  
No Connect  
10  
11  
12  
13  
14  
15  
DQ8  
NC  
A5  
RAS  
NC  
A0 - A8  
RAS  
CAS  
WE  
MODULE OPTIONS  
*
*
*
DQ4  
A6  
NC  
Leadless SIM: AK58256AS  
Leaded SIP: AK58256AG  
DQ1  
DQ2  
DQ3  
DQ4  
A7  
Vcc  
DQ5 +  
*
DQ6  
DQ7  
DQ8  
+
+
+
*
*
*
OE  
*

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