AFE78101, AFE88101
ZHCSP80 –DECEMBER 2022
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A rectifier is also implemented for reverse polarity protection so that the design can be connected to the bus
regardless of the pin orientation or polarity without damage to the design.
8.2.1.2.4 System Current Budget
Power consumption is an important consideration when designing two-wire transmitters. Power supplied from
the loop must power all the circuitry related to the transmitter and sensor. The minimum loop current in two-wire
applications is typically 4 mA. However, for error indications, this current is as low as 3.375 mA. Therefore, the
power budget of all transducer circuitry must be less than the maximum allowable system power budget of 3 mA.
表 8-2 lists the specified maximum quiescent current of all included active components (provided from the
respective data sheets).
表8-2. Typical Component Currents
DEVICE
TPS7A0230
DESCRIPTION
TYPICAL CURRENT (µA)
LDO
0.025
AFE88101
16-bit DAC
170
OPA333 (2)
Operational amplifier
Shunt regulator
Microcontroller
Digital isolation
17
60
TLVH431B
MSP430
Dependent on firmware
Dependent on communications
ISO7021D (2), ISO7041F
8.2.1.3 Application Curves
图8-7. Circuit Start-Up
8.3 Initialization Set Up
This section describes several recommendations to set up the AFEx8101.
The AFEx8101 power up with the CRC enabled. If the device is intended to be run without the CRC, the CRC
must be disabled by setting the CRC_EN bit to 0h in the CONFIG register. Be aware that the command to write
to this register is first done with the CRC enabled. The CRC byte must be appended to the command for the
device to interpret the command correctly. To disable the CRC after start up, write 0x02 0x00 0x26 0x24 to the
device. The first three bytes write the command, while the last byte is the CRC byte. For more information on the
CRC, see the communication description in 节7.5.2.3.
The AFEx8101 also power up with the SDO pin disabled. The SDO is required for reading from any of the device
registers, as well as reading any data from the ADC in SPI mode. The SDO is enabled by writing 0h into the
DSDO bit in the CONFIG register. See also 节7.5.2.1 and 节7.5.2.2.
To enable the ADC, first enable the ADC buffer by writing 0h into the BUF_PD bit in the ADC_CFG register.
Information about using the ADC in different modes of operation is in 节7.3.2.
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