Datasheet > AFEDRI8201PFBRG4

AFEDRI8201PFBRG4

更新时间： 2024-02-24 18:17:25

品牌	Logo	应用领域
德州仪器 - TI		商用集成电路
页数	文件大小	规格书
26页	675K
描述
SPECIALTY CONSUMER CIRCUIT, PQFP48, GREEN, PLASTIC, QFP-48

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AFEDRI8201PFBRG4 技术参数

是否无铅：	不含铅	是否Rohs认证：	符合
生命周期：	Obsolete	零件包装代码：	QFP
包装说明：	TFQFP,	针数：	48
Reach Compliance Code：	unknown	HTS代码：	8542.39.00.01
风险等级：	5.8	其他特性：	IT ALSO REQUIRES 1.71V TO 1.89V SUPPLY
商用集成电路类型：	CONSUMER CIRCUIT	JESD-30 代码：	S-PQFP-G48
JESD-609代码：	e4	长度：	7 mm
湿度敏感等级：	2	功能数量：	1
端子数量：	48	最高工作温度：	85 °C
最低工作温度：	-40 °C	封装主体材料：	PLASTIC/EPOXY
封装代码：	TFQFP	封装形状：	SQUARE
封装形式：	FLATPACK, THIN PROFILE, FINE PITCH	峰值回流温度（摄氏度）：	260
认证状态：	Not Qualified	座面最大高度：	1.2 mm
最大供电电压 (Vsup)：	3.45 V	最小供电电压 (Vsup)：	3.15 V
表面贴装：	YES	温度等级：	INDUSTRIAL
端子面层：	Nickel/Palladium/Gold (Ni/Pd/Au)	端子形式：	GULL WING
端子节距：	0.5 mm	端子位置：	QUAD
处于峰值回流温度下的最长时间：	NOT SPECIFIED	宽度：	7 mm
Base Number Matches：	1

AFEDRI8201PFBRG4 数据手册

AFEDRI8201

SBWS017F − SEPTEMBER 2003 − REVISED AUGUST 2005

IF ADC Front End for AM/FM and HD Radios

F_DEATURES

DESCRIPTION

The AFEDRI8201 implements the receive channel analog

functions required for intermediate-frequency (IF)

sampled AM/FM and HD digital radio receivers. It is

designed to be used with TI’s DRIx50 digital baseband

processor. The AFEDRI8201 is programmed by the

DRIx50 for use in AM/FM and HD radio. The AFEDRI8201

oversamples the radio tuner IF output at speeds of up to

80MHz to reduce noise and improve dynamic range. The

radio tuner output IF is typically 10.7MHz for AM or FM as

well as 450kHz or 455kHz for AM, as desired. The

AFEDRI8201 then mixes, filters, and decimates the signal

to provide baseband I and Q output signals to the digital

baseband processor. The AFEDRI8201 also includes a

general-purpose 12-bit control digital-to-analog converter

(DAC) to provide a gain control signal or other analog

feedback to the tuner.

Interfaces To Texas Instruments DRIx50 HD

Radio Baseband Processors

12-Bit, 80MSPS ADC Reduces Noise and

Improves Sensitivity

Typical SNR of 102dB in 3kHz Bandwidth

Programmable Input Range For Optimum

Tuner Dynamic Range

Integrated Digital Downconverter (DDC)

− Quadrature Mixer, NCO, CIC Decimation

Filter, And FIR Filters

Mixer: 32-Bit Frequency and Phase

Decimation Ratio: 32 to 4096

User-Programmable FIR Filters with 16-Bit

Coefficients

12-Bit Auxiliary DAC

The DRIx50 digital baseband device writes control register

data as well as decimation filter coefficients to the

AFEDRI8201 through the industry-standard SPI control

interface. The baseband output signals are transported to

the DRIx50 through a general-purpose, high-speed serial

interface (TI’s Buffered Serial Ports, McBSP).

Code Composer Module for Easy Software

Generation

SPI Control Interface

A_DPPLICATIONS

This unit uses 3.3V analog and 1.8V digital power

supplies. Typical power dissipation is 490mW. The digital

I/O lines can be powered by a 3.3V supply.

AM/FM and HD Radio Receivers

IF Receive Channels

Software Radios

Narrowband Receivers

DOUT0

IFP

12−Bit

Pipeline

ADC

Quadrature

Mixer

CIC Filter

FIR Filter 1

FIR Filter 2A

DOUT1

DFSO

DCLK

DIN

IFM

NCO

FIR Filter 2B

Auxiliary

DAC

AUX

DFSI

Voltage

Reference

Clock

Interface

Timing

Generator

SPI Control

Interface

REFM VCM REFP VGB MCLK MCLKB PWD SYNC RESET

SCK MOSI MISO CS

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments

semiconductor products and disclaimers thereto appears at the end of this data sheet.

SPI is a trademark of Motorola, Inc. All other trademarks are the property of their respective owners.

ꢀꢁ ꢂ ꢃꢄ ꢅ ꢆꢇ ꢂꢈ ꢃ ꢉꢆꢉ ꢊꢋ ꢌꢍ ꢎꢏ ꢐꢑꢊ ꢍꢋ ꢊꢒ ꢓꢔ ꢎ ꢎ ꢕꢋꢑ ꢐꢒ ꢍꢌ ꢖꢔꢗ ꢘꢊꢓ ꢐꢑꢊ ꢍꢋ ꢙꢐ ꢑꢕꢚ ꢀꢎ ꢍꢙꢔ ꢓꢑꢒ

ꢓ ꢍꢋ ꢌꢍꢎ ꢏ ꢑꢍ ꢒ ꢖꢕ ꢓ ꢊ ꢌꢊ ꢓ ꢐ ꢑꢊ ꢍꢋꢒ ꢖ ꢕꢎ ꢑꢛꢕ ꢑꢕ ꢎ ꢏꢒ ꢍꢌ ꢆꢕꢜ ꢐꢒ ꢇꢋꢒ ꢑꢎ ꢔꢏ ꢕꢋꢑ ꢒ ꢒꢑ ꢐꢋꢙ ꢐꢎ ꢙ ꢝ ꢐꢎ ꢎ ꢐ ꢋꢑꢞꢚ

ꢀꢎ ꢍ ꢙꢔꢓ ꢑ ꢊꢍ ꢋ ꢖꢎ ꢍ ꢓ ꢕ ꢒ ꢒ ꢊꢋ ꢟ ꢙꢍ ꢕ ꢒ ꢋꢍꢑ ꢋꢕ ꢓꢕ ꢒꢒ ꢐꢎ ꢊꢘ ꢞ ꢊꢋꢓ ꢘꢔꢙ ꢕ ꢑꢕ ꢒꢑꢊ ꢋꢟ ꢍꢌ ꢐꢘ ꢘ ꢖꢐ ꢎ ꢐꢏ ꢕꢑꢕ ꢎ ꢒꢚ

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