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ADUM221N1BRWZ PDF预览

ADUM221N1BRWZ

更新时间： 2024-02-01 12:21:05
品牌 Logo 应用领域
亚德诺 - ADI 光电二极管
页数 文件大小 规格书
23页 571K
描述
ADUM221N1BRWZ

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ADUM221N1BRWZ 技术参数

是否无铅： 含铅是否Rohs认证： 符合
生命周期：Active包装说明：SOP,
针数：16Reach Compliance Code：compliant
风险等级：2.13模拟集成电路 - 其他类型：ANALOG CIRCUIT
JESD-30 代码：R-PDSO-G16JESD-609代码：e3
长度：10.3 mm湿度敏感等级：3
功能数量：1端子数量：16
最高工作温度：125 °C最低工作温度：-40 °C
封装主体材料：PLASTIC/EPOXY封装代码：SOP
封装形状：RECTANGULAR封装形式：SMALL OUTLINE
峰值回流温度（摄氏度）：260座面最大高度：2.65 mm
最大供电电压 (Vsup)：5 V最小供电电压 (Vsup)：1.7 V
标称供电电压 (Vsup)：1.8 V表面贴装：YES
技术：CMOS温度等级：AUTOMOTIVE
端子面层：Matte Tin (Sn)端子形式：GULL WING
端子节距：1.27 mm端子位置：DUAL
处于峰值回流温度下的最长时间：NOT SPECIFIED宽度：7.5 mm
Base Number Matches：1

ADUM221N1BRWZ 数据手册

 浏览型号ADUM221N1BRWZ的Datasheet PDF文件第16页浏览型号ADUM221N1BRWZ的Datasheet PDF文件第17页浏览型号ADUM221N1BRWZ的Datasheet PDF文件第18页浏览型号ADUM221N1BRWZ的Datasheet PDF文件第20页浏览型号ADUM221N1BRWZ的Datasheet PDF文件第21页浏览型号ADUM221N1BRWZ的Datasheet PDF文件第22页 
Data Sheet  
ADuM220N/ADuM221N/ADuM225N/ADuM226N  
THEORY OF OPERATION  
Figure 17 illustrates the waveforms for models of the ADuM220N/  
ADuM221N/ADuM225N/ADuM226N that have the condition  
of the fail-safe output state equal to low, where the carrier  
waveform is off when the input state is low. If the input side is  
off or not operating, the fail-safe output state of low (ADuM220N0/  
ADuM221N0/ADuM225N0/ADuM226N0 models) sets the  
output to low. For the ADuM220N/ADuM221N/ADuM225N/  
ADuM226N that have a fail-safe output state of high, Figure 18  
illustrates the conditions where the carrier waveform is off when  
the input state is high. When the input side is off or not operating,  
the fail-safe output state of high (ADuM220N1/ADuM221N1/  
ADuM225N1/ADuM226N1) sets the output to high. See the  
Ordering Guide for the model numbers that have the fail-safe  
output state of low or the fail-safe output state of high.  
OVERVIEW  
The ADuM220N/ADuM221N/ADuM225N/ADuM226N use  
a high frequency carrier to transmit data across the isolation  
barrier using iCoupler chip scale transformer coils separated by  
layers of polyimide isolation. Using an on/off keying (OOK)  
technique and the differential architecture shown in Figure 17  
and Figure 18, the ADuM220N/ADuM221N/ADuM225N/  
ADuM226N have very low propagation delay and high speed.  
Internal regulators and input/output design techniques allow  
logic and supply voltages over a wide range from 1.7 V to 5.5 V,  
offering voltage translation of 1.8 V, 2.5 V, 3.3 V, and 5 V logic.  
The architecture is designed for high common-mode transient  
immunity and high immunity to electrical noise and magnetic  
interference. Radiated emissions are minimized with a spread  
spectrum OOK carrier and other techniques.  
REGULATOR  
REGULATOR  
RECEIVER  
TRANSMITTER  
V
V
OUT  
IN  
GND  
GND  
2
1
Figure 17. Operational Block Diagram of a Single Channel with a Low Fail-Safe Output State  
REGULATOR  
REGULATOR  
TRANSMITTER  
RECEIVER  
V
V
OUT  
IN  
GND  
GND  
2
1
Figure 18. Operational Block Diagram of a Single Channel with a High Fail-Safe Output State  
Rev. A | Page 19 of 23  
 
 
 
 
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