Datasheet > ADUC814ARU

ADUC814ARU

更新时间： 2024-02-15 15:27:56

品牌	Logo	应用领域
罗彻斯特 - ROCHESTER		时钟光电二极管外围集成电路
页数	文件大小	规格书
73页	1495K
描述
8-BIT, FLASH, 16.78 MHz, MICROCONTROLLER, PDSO28, 4.40 X 9.70 MM, MO-153AE, TSSOP-28

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技术参数
数据手册

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ADUC814ARU 技术参数

是否无铅：	含铅	是否Rohs认证：	不符合
生命周期：	Active	零件包装代码：	TSSOP
包装说明：	TSSOP,	针数：	28
Reach Compliance Code：	unknown	风险等级：	5.21
具有ADC：	YES	地址总线宽度：
位大小：	8	最大时钟频率：	16.78 MHz
DAC 通道：	YES	DMA 通道：	NO
外部数据总线宽度：		JESD-30 代码：	R-PDSO-G28
JESD-609代码：	e0	长度：	9.7 mm
湿度敏感等级：	1	I/O 线路数量：	16
端子数量：	28	最高工作温度：	125 °C
最低工作温度：	-40 °C	PWM 通道：	NO
封装主体材料：	PLASTIC/EPOXY	封装代码：	TSSOP
封装形状：	RECTANGULAR	封装形式：	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
峰值回流温度（摄氏度）：	240	ROM可编程性：	FLASH
座面最大高度：	1.2 mm	速度：	16.78 MHz
最大供电电压：	3.3 V	最小供电电压：	2.7 V
标称供电电压：	3 V	表面贴装：	YES
技术：	CMOS	温度等级：	AUTOMOTIVE
端子面层：	TIN LEAD	端子形式：	GULL WING
端子节距：	0.65 mm	端子位置：	DUAL
处于峰值回流温度下的最长时间：	30	宽度：	4.4 mm
uPs/uCs/外围集成电路类型：	MICROCONTROLLER	Base Number Matches：	1

ADUC814ARU 数据手册

ADuC814

¹Temperature range –40ºC to +125ºC.

²ADC linearity is guaranteed when operating in nonpipelined mode, i.e., ADC conversion followed sequentially by a read of the ADC result. ADC linearity is also

guaranteed during normal MicroConverter core operation.

³ADC LSB size = V_REF/2¹², i.e., for internal V_REF= 2.5 V, 1 LSB = 610 µV, and for external V_REF= 1 V, 1 LSB = 244 µV.

⁴Offset and gain error and offset and gain error match are measured after factory calibration.

⁵Based on external ADC system components the user may need to execute a system calibration to remove additional external channel errors

and achieve these specifications.

⁶Measured with coherent sampling system using external 16.77 MHz clock via P3.5 (Pin 22).

⁷SNR calculation includes distortion and noise components.

⁸Channel-to-channel crosstalk is measured on adjacent channels.

⁹The temperature monitor gives a measure of the die temperature directly; air temperature can be inferred from this result.

¹⁰DAC linearity is calculated using a reduced code range of 48 to 4095, 0 V to V_REFrange; a reduced code range of 48 to 3950, 0 V to V_DDrange. DAC output load = 10 kΩ

and 100 pF.

¹¹DAC differential nonlinearity specified on 0 V to V_REFand 0 to V_DDranges.

¹²Measured with V_REFand C_REFpins decoupled with 0.1 µF capacitors to ground. Power-up time for the internal reference is determined by the value of the decoupling

capacitor chosen for both the V_REFand C_REFpins.

¹³When using an external reference device, the internal band gap reference input can be bypassed by setting the ADCCON1.6 bit. In this mode, the V_REFand C_REFpins

need to be shorted together for correct operation.

¹⁴These numbers are not production tested but are guaranteed by design and/or characterization data on production release.

¹⁵Pins configured in I²C compatible mode or SPI mode; pins configured as digital inputs during this test.

¹⁶These typical specifications assume no loading on the XTAL2 pin. Any additional loading on the XTAL2 pin increases the power-on times.

¹⁷Flash/EE memory reliability characteristics apply to both the Flash/EE program memory and the Flash/EE data memory.

¹⁸Endurance is qualified to 100 kcycles as per JEDEC Std. 22, Method A117 and measured at –40ºC, +25°C, and +125°C; typical endurance at +25°C is 700 kcycles.

¹⁹Retention lifetime equivalent at junction temperature (T_J) = 55°C as per JEDEC Std. 22, Method A117. Retention lifetime based on an activation energy of 0.6 eV

derates with junction temperature as shown in Figure 33 in the Flash/EE memory description section.

²⁰Power supply current consumption is measured in normal, idle, and power-down modes under the following conditions:

Normal Mode: Reset and all digital I/O pins = open circuit, core Clk changed via CD bits in PLLCON, core executing internal software loop.

Idle Mode: Reset and all digital I/O pins = open circuit, core Clk changed via CD bits in PLLCON, PCON.0 = 1, core execution suspended in idle mode.

Power-Down Mode: Reset and all P1.2–P1.7 pins = 0.4 V; all other digital I/O pins are open circuit, Core Clk changed via CD bits in PLLCON, PCON.1 = 1,

Core execution suspended in power-down mode, OSC turned on or off via OSC_PD bit (PLLCON.7) in PLLCON SFR.

²¹DV_DDpower supply current increases typically by 3 mA (3 V operation) and 10 mA (5 V operation) during a Flash/EE memory program or erase cycle.

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与ADUC814ARU相关器件

型号	品牌	获取价格	描述	数据表
ADUC814ARU-REEL	ADI	获取价格	MicroConverter, Small Package 12-Bit ADC with Embedded Flash MCU
ADUC814ARU-REEL7	ADI	获取价格	MicroConverter, Small Package 12-Bit ADC with Embedded Flash MCU
ADUC814ARU-REEL7	ROCHESTER	获取价格	8-BIT, FLASH, 16.78 MHz, MICROCONTROLLER, PDSO28, 4.40 X 9.70 MM, MO-153AE, TSSOP-28
ADUC814ARUZ	ROCHESTER	获取价格	8-BIT, FLASH, 16.78MHz, MICROCONTROLLER, PDSO28, 4.40 X 9.70 MM, MO-153AE, TSSOP-28
ADUC814ARUZ	ADI	获取价格	MicroConverterÂ®, Small Package 12-Bit ADC wi
ADUC814BRU	ADI	获取价格	MicroConverter, Small Package 12-Bit ADC with Embedded Flash MCU
ADUC814BRU	ROCHESTER	获取价格	8-BIT, FLASH, 16.78 MHz, MICROCONTROLLER, PDSO28, 4.40 X 9.70 MM, MO-153AE, TSSOP-28
ADUC814BRU-REEL	ADI	获取价格	MicroConverter, Small Package 12-Bit ADC with Embedded Flash MCU
ADUC814BRU-REEL7	ADI	获取价格	MicroConverter, Small Package 12-Bit ADC with Embedded Flash MCU
ADUC814BRUZ	ADI	获取价格	MicroConverterÂ®, Small Package 12-Bit ADC wi

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