ADT7518
1
9
1
9
SCL
1
0
0
1
A2
A1
A0
R/W
P7
P6
P5
P4
P3
P2
P1
P0
SDA
ACK. BY
ADT7518
START BY
MASTER
ACK. BY
ADT7518
STOP BY
MASTER
FRAME 1
SERIAL BUS ADDRESS BYTE
FRAME 2
ADDRESS POINTER REGISTER BYTE
Figure 56. I2C—Writing to the Address Pointer Register to Select a Register for a Subsequent Read Operation
1
1
9
1
9
SCL
SDA
0
0
1
A2
A1
A0
P7
P6
P5
P4
P3
P2
P1
P0
R/W
START BY
MASTER
ACK. BY
ADT7518
ACK. BY
ADT7518
FRAME 1
SERIAL BUS ADDRESS BYTE
FRAME 2
ADDRESS POINTER REGISTER BYTE
1
9
SCL (CONTINUED)
SDA (CONTINUED)
D7
D6
D5
D4
D3
D2
D1
D0
ACK. BY
ADT7518
STOP BY
MASTER
FRAME 3
DATA BYTE
Figure 57. I2C—Writing to the Address Pointer Register Followed by a Single Byte of Data to the Selected Register
1
9
1
9
SCL
SDA
1
0
0
1
A2
A1
A0 R/W
D7
D6
D5
D4
D3
D2
D1
D0
ACK. BY
ADT7518
START BY
MASTER
NO ACK. BY STOP BY
MASTER MASTER
FRAME 1
SERIAL BUS ADDRESS BYTE
FRAME 2
SINGLE DATA BYTE FROM ADT7518
Figure 58. I2C—Reading a Single Byte of Data from a Selected Register
Write Operation
Read Operation
Figure 59 shows the timing diagram for a write operation to the
ADT7518. Data is clocked into the registers on the rising edge
Figure 60 to Figure 62 show the timing diagrams necessary to
accomplish correct read operations. To read back from a reg-
ister, first write to the address pointer register with the address
of the register to be read from. This operation is shown in
Figure 60. Figure 61 shows the procedure for reading back a
single byte of data. The read command is first sent to the part
during the first eight clock cycles. During the following eight
clock cycles, the data contained in the register selected by the
address pointer register is output onto the DOUT line. Data is
output onto the DOUT line on the falling edge of SCLK. Figure 62
shows the procedure when reading data from two sequential
registers. Multiple data reads are possible in the SPI interface
mode as the address pointer register is autoincremental. The
address pointer register will autoincrement from 00h to 3Fh and
will loop back to start again at 00h when it reaches 3Fh.
of SCLK. When the
line is high, the DIN and DOUT lines
CS
are in three-state mode. Only when the
goes from a high to a
CS
low does the part accept any data on the DIN line. In SPI mode,
the address pointer register is capable of autoincrementing to
the next register in the register map without having to load the
address pointer register each time. In Figure 59, the register
address portion gives the first register that will be written to.
Subsequent data bytes will be written into sequential writable
registers. Thus, after each data byte has been written into a
register, the address pointer register autoincrements its value to
the next available register. The address pointer register will
autoincrement from 00h to 3Fh and will loop back to start again
at 00h when it reaches 3Fh.
Rev. A | Page 36 of 40