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ADT7475ARQZ-REEL PDF预览

ADT7475ARQZ-REEL

更新时间: 2024-02-17 11:12:17
品牌 Logo 应用领域
安森美 - ONSEMI 风扇监控控制器
页数 文件大小 规格书
58页 648K
描述
dBCOOL Remote Thermal Monitor and Fan Controller

ADT7475ARQZ-REEL 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Transferred零件包装代码:SSOP
包装说明:ROHS COMPLIANT, MO-137-AB, QSOP-16针数:16
Reach Compliance Code:unknownECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.29
模拟集成电路 - 其他类型:ANALOG CIRCUITJESD-30 代码:R-PDSO-G16
JESD-609代码:e3长度:4.9 mm
湿度敏感等级:1功能数量:1
端子数量:16最高工作温度:125 °C
最低工作温度:-40 °C封装主体材料:PLASTIC/EPOXY
封装代码:SSOP封装等效代码:SSOP16,.25
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, SHRINK PITCH
峰值回流温度(摄氏度):260电源:3.3 V
认证状态:Not Qualified座面最大高度:1.7526 mm
子类别:Motion Control Electronics最大供电电流 (Isup):3 mA
最大供电电压 (Vsup):3.6 V最小供电电压 (Vsup):3 V
标称供电电压 (Vsup):3.3 V表面贴装:YES
温度等级:AUTOMOTIVE端子面层:MATTE TIN
端子形式:GULL WING端子节距:0.635 mm
端子位置:DUAL处于峰值回流温度下的最长时间:40
宽度:3.9116 mm

ADT7475ARQZ-REEL 数据手册

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ADT7475  
Table 45. Register 0x77 — Extended Resolution Register 2 (Note 1)  
Bit No.  
[3:2]  
Mnemonic  
TDM1  
R/W  
R/W  
R/W  
R/W  
Description  
Remote 1 temperature LSBs. Holds the 2 LSBs of the 10bit Remote 1 temperature measurement.  
Local temperature LSBs. Holds the 2 LSBs of the 10bit local temperature measurement.  
Remote 2 temperature LSBs. Holds the 2 LSBs of the 10bit Remote 2 temperature measurement.  
[5:4]  
LTMP  
[7:6]  
TDM2  
1. If this register is read, this register and the registers holding the MSB of each reading are frozen until read.  
Table 46. Register 0x78 — Configuration Register 3 (PowerOn Default = 0x00) (Note 1)  
Bit No.  
Mnemonic  
R/W  
Description  
[0]  
ALERT  
Enable  
R/W  
ALERT = 1, Pin 5 (PWM2/SMBALERT) is configured as an SMBALERT interrupt output to  
indicate outoflimit error conditions.  
[1]  
THERM  
R/W  
THERM Enable = 1 enables THERM timer monitoring functionality on Pin 9. Also determined by  
Bit 0 and Bit 1 (PIN9FUNC) of Configuration Register 4. When THERM is asserted, if the fans  
are running and the boost bit is set, the fans run at full speed. Alternatively, THERM can be  
programmed so that a timer is triggered to time how long THERM has been asserted.  
[2]  
[3]  
[4]  
[5]  
[6]  
[7]  
BOOST  
FAST  
DC1  
R/W  
R/W  
R/W  
R/W  
R/W  
R/W  
When THERM is an input and BOOST = 1, assertion of THERM causes all fans to run at the  
maximum programmed duty cycle for failsafe cooling.  
FAST = 1, enables fast TACH measurements on all channels. This increases the TACH  
measurement rate from once per second to once every 250 ms (4x).  
DC1 = 1, enables TACH measurements to be continuously made on TACH1. Fans must be driven  
by dc. Setting this bit prevents pulse stretching because it is not required for dcdriven motors.  
DC2  
DC2 = 1, enables TACH measurements to be continuously made on TACH2. Fans must be driven  
by dc. Setting this bit prevents pulse stretching because it is not required for dcdriven motors.  
DC3  
DC3 = 1, enables TACH measurements to be continuously made on TACH3. Fans must be driven  
by dc. Setting this bit prevents pulse stretching because it is not required for dcdriven motors.  
DC4  
DC4 = 1, enables TACH measurements to be continuously made on TACH4. Fans must be driven  
by dc. Setting this bit prevents pulse stretching because it is not required for dcdriven motors.  
1. These registers become readonly when the Configuration Register 1 lock bit is set to 1. Any subsequent attempts to write to these registers fail.  
Table 47. Register 0x79 — THERM Timer Status Register (PowerOn Default = 0x00)  
Bit No.  
Mnemonic  
R/W  
Description  
[0]  
ASRT/  
TMR0  
Readonly  
This bit is set high on the assertion of the THERM input and is cleared on read. If the THERM  
assertion time exceeds 45.52 ms, this bit is set and becomes the LSB of the 8bit TMR  
reading. This allows THERM assertion times from 45.52 ms to 5.82 sec to be reported back  
with a resolution of 22.76 ms.  
[7:1]  
TMR  
Readonly  
Times how long THERM input is asserted. These seven bits read zero until the THERM  
assertion time exceeds 45.52 ms.  
Table 48. THERM Timer Limit Register (PowerOn Default = 0x00)  
Bit No.  
Mnemonic  
R/W  
Description  
[7:0]  
LIMT  
R/W  
Sets the maximum THERM assertion length allowed before an interrupt is generated. This  
is an 8bit limit with a resolution of 22.76 ms allowing THERM assertion limits of 45.52 ms  
to 5.82 sec to be programmed. If the THERM assertion time exceeds this limit, Bit 5 (F4P)  
of Interrupt Status Register 2 (0x42) is set. If the limit value is 0x00, an interrupt is generated  
immediately on the assertion of the THERM input.  
http://onsemi.com  
55  
 

ADT7475ARQZ-REEL 替代型号

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ADM1033ARQZ-REEL ONSEMI

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ADT7460ARQZ-REEL ONSEMI

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dBCOOL Remote Thermal Monitor and Fan Controller

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