Data Sheet
ADPA7009-2
20 GHz to 54 GHz, GaAs, pHEMT, MMIC, 29 dBm (0.5 W) Power Amplifier
FEATURES
FUNCTIONAL BLOCK DIAGRAM
► Integrated power-supply capacitors and bias inductors
► Integrated AC coupling capacitors
► Gain: 17.5 dB typical at 20 GHz to 35 GHz
► Input return loss: 14 dB typical at 20 GHz to 35 GHz
► Output return loss: 15 dB typical at 20 GHz to 35 GHz
► OP1dB: 28 dBm typical at 20 GHz to 35 GHz
► PSAT: 28.5 dBm typical at 20 GHz to 35 GHz
► OIP3: 34.5 dBm typical at 20 GHz to 35 GHz
► Noise figure: 7.5 dB typical at 20 GHz to 35 GHz
► 5 V supply voltage at 850 mA
► 50 Ω matched input and output
► 5.00 mm × 5.00 mm, 24-terminal chip array, small outline, no
lead cavity [LGA_CAV] package
Figure 1. Functional Block Diagram
APPLICATIONS
► Military and space
► Test instrumentation
GENERAL DESCRIPTION
The ADPA7009-2 is a gallium arsenide (GaAs), pseudomorphic
high-electron-mobility transistor (pHEMT), monolithic microwave in-
tegrated circuit (MMIC), 0.5 W power amplifier with an integrated
temperature-compensated, on-chip power detector that operates
between 20 GHz and 54 GHz. The amplifier provides a gain of 17.5
dB, an output power for 1 dB compression (OP1dB) of 28 dBm, and
a typical output third-order intercept (OIP3) of 34.5 dBm at 20 GHz
to 35 GHz. The ADPA7009-2 requires 850 mA from a 5 V supply
voltage (VDDx). The RF input and outputs are internally matched
and DC-blocked for ease of integration into higher level assemblies.
Most of the typically required external passive components for
operation (AC coupling capacitors and power supply decoupling
capacitors) are integrated, which facilitates a small, compact printed
circuit board (PCB) footprint. The ADPA7009-2 is available in a 5.00
mm × 5.00 mm, 24-terminal chip array, small outline, no lead cavity
[LGA_CAV] package.
Rev. 0
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