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ADP5585ACPZ-01-R7 PDF预览

ADP5585ACPZ-01-R7

更新时间: 2024-02-09 05:21:31
品牌 Logo 应用领域
亚德诺 - ADI 解码器
页数 文件大小 规格书
40页 605K
描述
Keypad Decoder and I/O Expansion

ADP5585ACPZ-01-R7 技术参数

Source Url Status Check Date:2013-05-01 14:56:47.079是否无铅: 含铅
是否Rohs认证: 符合生命周期:Active
零件包装代码:QFN包装说明:HVQCCN,
针数:16Reach Compliance Code:compliant
ECCN代码:EAR99HTS代码:8542.39.00.01
风险等级:5.55JESD-30 代码:S-XQCC-N16
JESD-609代码:e3长度:3 mm
湿度敏感等级:3功能数量:1
端子数量:16最高工作温度:85 °C
最低工作温度:-40 °C封装主体材料:UNSPECIFIED
封装代码:HVQCCN封装形状:SQUARE
封装形式:CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE峰值回流温度(摄氏度):260
座面最大高度:0.8 mm标称供电电压:1.8 V
表面贴装:YES电信集成电路类型:TELECOM CIRCUIT
温度等级:INDUSTRIAL端子面层:Matte Tin (Sn)
端子形式:NO LEAD端子节距:0.5 mm
端子位置:QUAD处于峰值回流温度下的最长时间:30
宽度:3 mmBase Number Matches:1

ADP5585ACPZ-01-R7 数据手册

 浏览型号ADP5585ACPZ-01-R7的Datasheet PDF文件第32页浏览型号ADP5585ACPZ-01-R7的Datasheet PDF文件第33页浏览型号ADP5585ACPZ-01-R7的Datasheet PDF文件第34页浏览型号ADP5585ACPZ-01-R7的Datasheet PDF文件第36页浏览型号ADP5585ACPZ-01-R7的Datasheet PDF文件第37页浏览型号ADP5585ACPZ-01-R7的Datasheet PDF文件第38页 
Data Sheet  
ADP5585  
Bit(s)  
Bit Name  
Access  
Description  
5
R4_ EXTEND_CFG  
Read/write  
0 = R4 remains configured as GPIO 5.  
1 = R4 reconfigured as RESET1 output.  
Reserved.  
4
N/A  
3 to 2  
R3_EXTEND_CFG[1:0]  
Read/write  
Read/write  
00 = R3 remains configured as GPIO 4.  
01 = R3 reconfigured as LC input for the logic block.  
10 = R3 reconfigured as PWM_OUT output from PWM block.  
11 = unused.  
1
0
N/A  
Reserved.  
R0_ EXTEND_CFG  
0 = R0 remains configured as GPIO 1.  
1 = R0 reconfigured as LY output from the logic block.  
GENERAL_CFG Register 0x3B  
Table 67. GENERAL_CFG Bit Descriptions  
Bit(s)  
Bit Name  
Access  
Description  
7
OSC_EN  
0 = disable internal 1 MHz oscillator.  
1 = enable internal 1 MHz oscillator.  
Read/write  
OSC_FREQ[1:0]  
Sets the input clock frequency fed from the base 1 MHz oscillator to the digital  
core. Slower frequencies result in less quiescent current, but key and GPI scan  
times increase.  
6 to 5  
Read/write  
00 = 50 kHz.  
01 = 100 kHz.  
10 = 200 kHz.  
11 = 500 kHz.  
Reserved.  
N/A  
4 to 2  
1
INT_CFG  
Configure the behavior of the  
is pending.  
INT  
pin if the user tries to clear it while an interrupt  
Read/write  
R/W  
0 =  
1 =  
INT pin remains asserted if an interrupt is pending.  
INT pin deasserts for 50 µs and reasserts if an interrupt is pending.  
0
RST_CFG  
Configure the response ADP5585 has to the RST pin.  
0 = ADP5585 resets if RST is low.  
1 = ADP5585 does not reset if RST is low.  
INT_EN Register 0x3C  
Table 68. INT_EN Bit Descriptions  
Bit(s)  
7 to 5  
4
Bit Name  
Access  
Description  
N/A  
Reserved.  
0 = Logic 1 interrupt is disabled.  
LOGIC_IEN  
Read/write  
1 = assert the  
Reserved.  
INT pin if LOGIC_INT is set.  
3
2
N/A  
0 = overflow interrupt is disabled.  
OVRFLOW_IEN  
Read/write  
Read/write  
Read/write  
1 = assert the  
INT pin if OVRFLOW_INT is set.  
0 = GPI interrupt is disabled.  
1
0
GPI_IEN  
1 = assert the  
INT pin if GPI_INT is set.  
0 = event interrupt is disabled.  
EVENT_IEN  
1 = assert the  
INT pin if EVENT_INT is set.  
Rev. C | Page 35 of 40  
 
 

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