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ADMC401BST PDF预览

ADMC401BST

更新时间: 2024-11-08 22:50:07
品牌 Logo 应用领域
亚德诺 - ADI 电机控制器
页数 文件大小 规格书
60页 413K
描述
Single-Chip, DSP-Based High Performance Motor Controller

ADMC401BST 数据手册

 浏览型号ADMC401BST的Datasheet PDF文件第2页浏览型号ADMC401BST的Datasheet PDF文件第3页浏览型号ADMC401BST的Datasheet PDF文件第4页浏览型号ADMC401BST的Datasheet PDF文件第5页浏览型号ADMC401BST的Datasheet PDF文件第6页浏览型号ADMC401BST的Datasheet PDF文件第7页 
Single-Chip, DSP-Based  
High Performance Motor Controller  
a
ADMC401  
Internal or External Voltage Reference  
Out-of-Range Detection  
Voltage Reference  
FEATURES  
26 MIPS Fixed-Point DSP Core  
Single Cycle Instruction Execution (38.5 ns)  
ADSP-21xx Family Code Compatible  
16-Bit Arithmetic and Logic Unit (ALU)  
Single Cycle 16-Bit 16-Bit Multiply and Accumulate  
Into 40-Bit Accumulator (MAC)  
32-Bit Shifter (Logical and Arithmetic)  
Multifunction Instructions  
Single Cycle Context Switch  
Internal 2.0 V 2.0% Voltage Reference  
Three-Phase 16-Bit PWM Generation Unit  
Programmable Switching Frequency, Dead Time and  
Minimum Pulsewidth  
Edge Resolution of 38.5 ns  
One or Two Updates per Switching Period  
Hardware Polarity Control  
Individual Enable/Disable of Each Output  
High Frequency Chopping Mode  
Zero Overhead Looping  
Conditional Instruction Execution  
Two Independent Data Address Generators  
Memory Configuration  
2K 24-Bit Internal Program Memory RAM  
2K 24-Bit Internal Program Memory ROM  
1K 16-Bit Internal Data Memory RAM  
14-Bit Address Bus and 24-Bit Data Bus for External  
Memory Expansion  
High Resolution Multichannel ADC  
12-Bit Pipeline Flash Analog-to-Digital Converter  
Eight Dedicated Analog Inputs  
Simultaneous Sampling Capability  
All Eight Inputs Converted in <2 s  
4.0 V p-p Input Voltage Range  
Dedicated Shutdown Pin (PWMTRIP)  
Additional Shutdown Pins in I/O System  
High Output Sink and Source Capability (10 mA)  
Incremental Encoder Interface Unit  
Quadrature Rates to 17.3 MHz  
Programmable Filtering of Encoder Inputs  
Alternative Frequency and Direction Mode  
Two Registration Inputs to Latch Count Value  
Optional Hardware Reset of Counter  
Single North Marker Mode  
Count Error Monitor Function  
Dedicated 16-Bit Loop Timer (Periodic Interrupts)  
Companion Encoder Event (1/T) Timer  
PWM Synchronized or External Convert Start  
(Continued on Page 14)  
FUNCTIONAL BLOCK DIAGRAM  
26 MIPS DSP CORE  
PM  
MEMORY  
ROM  
MOTOR CONTROL  
PERIPHERALS  
2K 24  
DATA  
ADDRESS  
WATCH- POWER-  
DIGITAL  
I/O  
UNIT  
PM  
RAM  
2K 24  
DM  
RAM  
1K 16  
EVENT  
CAPTURE  
UNIT  
GENERATORS  
INTERRUPT  
CONTROLLER  
ENCODER  
INTERFACE  
PROGRAM  
SEQUENCER  
DOG  
ON  
TIMER  
RESET  
DAG 1 DAG 2  
PROGRAM MEMORY ADDRESS  
DATA MEMORY ADDRESS  
PROGRAM MEMORY DATA  
EXTERNAL  
ADDRESS  
BUS  
EXTERNAL  
DATA  
BUS  
DATA MEMORY DATA  
SERIAL PORTS  
SPORT 0 SPORT 1  
PRECISION  
16-BIT  
PWM  
GENERATION  
2 CHANNEL  
AUXILIARY  
PWM  
ARITHMETIC UNITS  
ALU SHIFTER  
INTERVAL  
TIMER  
8 CHANNEL  
12-BIT ADC  
VOLTAGE  
REFERENCE  
MAC  
REV. B  
Information furnished by Analog Devices is believed to be accurate and  
reliable. However, no responsibility is assumed by Analog Devices for its  
use, nor for any infringements of patents or other rights of third parties  
which may result from its use. No license is granted by implication or  
otherwise under any patent or patent rights of Analog Devices.  
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.  
Tel: 781/329-4700  
Fax: 781/326-8703  
World Wide Web Site: http://www.analog.com  
© Analog Devices, Inc., 2000  

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