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ADM9240ARUZ-REEL PDF预览

ADM9240ARUZ-REEL

更新时间: 2024-01-14 07:57:35
品牌 Logo 应用领域
亚德诺 - ADI 光电二极管
页数 文件大小 规格书
22页 280K
描述
IC 1-CHANNEL POWER SUPPLY SUPPORT CKT, PDSO24, TSSOP-24, Power Management Circuit

ADM9240ARUZ-REEL 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Transferred零件包装代码:TSSOP
包装说明:TSSOP-24针数:24
Reach Compliance Code:unknownECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.15
可调阈值:NO模拟集成电路 - 其他类型:POWER SUPPLY SUPPORT CIRCUIT
JESD-30 代码:R-PDSO-G24JESD-609代码:e3
长度:7.8 mm信道数量:1
功能数量:1端子数量:24
最高工作温度:125 °C最低工作温度:-40 °C
封装主体材料:PLASTIC/EPOXY封装代码:TSSOP
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
峰值回流温度(摄氏度):260认证状态:Not Qualified
座面最大高度:1.1 mm最大供电电压 (Vsup):5.75 V
最小供电电压 (Vsup):2.85 V标称供电电压 (Vsup):5 V
表面贴装:YES温度等级:AUTOMOTIVE
端子面层:Matte Tin (Sn)端子形式:GULL WING
端子节距:0.65 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:4.4 mm
Base Number Matches:1

ADM9240ARUZ-REEL 数据手册

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ADM9240  
Table XV. Register 48h, Serial Address Register (P ower-O n D efault = 0010 11(A1)(A0))  
Bit  
Nam e  
R/W  
D escription  
Serial Bus Address (Bits 0 and 1 are Set by A0, A1 and Bit 7 is Read Only)  
0–6  
Serial Bus Address  
Read/Write  
Table XVI. Register 49h, VID 4/D evice ID Register (P ower-O n D efault 1000000(VID 4))  
Bit  
Nam e  
R/W  
D escription  
0
VID4  
Read  
VID4 Input from Pentium®  
1–7  
Reserved  
Read/Write  
Table XVII. Register 4Bh, Tem perature Configuration Register (P ower-O n D efault = 01h)  
Bit  
Nam e  
R/W  
D escription  
0–1  
Hot T emperature  
Interrupt Mode  
Select Bits  
Read/Write  
If Bit 0 and Bit 1 of this register are both zero or one, this selects the default  
interrupt mode, which gives the user an interrupt if the temperature goes above  
the hot limit. T he interrupt will be cleared once the status register is read, but it  
will again be generated when the next conversion has completed. It will continue to  
do so until the temperature goes below the hysteresis limit.  
A 0 on Bit 1 and a 1 on Bit 0 selects the one-time interrupt mode, which gives the  
user an interrupt when the temperature goes above the hot limit. T he interrupt will  
be cleared once the status register is read. Another interrupt will not be generated  
until the temperature first goes below the hysteresis limit. No more interrupts will  
be generated until the temperature again goes above the hot limit. T he correspond-  
ing bit will be cleared in the status register every time it is read, but may not set  
again when the next conversion is done. Note that this is the power-up default  
mode.  
A 1 on Bit 1 and a 0 on Bit 0 selects the comparator mode. T his gives an INT  
when the temperature exceeds the hot limit. T his INT remains active until the  
temperature goes below the hot limit (no hysteresis), when the INT will become  
inactive.  
2–6  
7
Reserved  
T emp  
Read/Write  
Read only  
Default = 00000  
LSB of T emperature Reading = 0.5°C  
Pentium is a registered trademark of Intel Corp.  
REV. 0  
–21–  

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