ADM660/ADM8660
Inverting Negative Voltage Generator
Table II. ADM8660 Charge-Pump Frequency Selection
Figures 5 and 6 show the ADM660/ADM8660 configured to
generate a negative output voltage. Input supply voltages from
1.5 V up to 7 V are allowable. For supply voltage less than 3 V,
LV must be connected to GND. This bypasses the internal
regulator circuitry and gives best performance in low voltage
applications. With supply voltages greater than 3 V, LV may
be either connected to GND or left open. Leaving it open facili-
tates direct substitution for the ICL7660.
FC
OSC
Charge Pump
C1, C2
GND
V+
Open
Open
25 kHz
120 kHz
See Typical Characteristics
10 µF
2.2 µF
GND or V+ Ext Cap
GND
Ext CLK Ext CLK Frequency/2
+1.5V TO +7V
INPUT
CLK OSC
+1.5V TO +7V
INPUT
ADM660
ADM8660
CMOS GATE
V+
OSC
LV
FC
FC
V+
OSC
LV
CAP+
GND
ADM660
+
CAP+
GND
C1
+
C1
INVERTED
NEGATIVE
OUTPUT
10F
CAP–
INVERTED
NEGATIVE
OUTPUT
OUT
CAP–
OUT
C2
C2
10F
+
+
Figure 7. ADM660/ADM8660 External Oscillator
Figure 5. ADM660 Voltage Inverter Configuration
Voltage Doubling Configuration
Figure 8 shows the ADM660 configured to generate increased
output voltages. As in the inverting mode, only two external
capacitors are required. The doubling function is achieved by
reversing some connections to the device. The input voltage is
applied to the GND pin and V+ is used as the output. Input
voltages from 2.5 V to 7 V are allowable. In this configuration,
pins LV, OUT must be connected to GND.
+1.5V TO +7V
INPUT
FC
V+
ADM8660
CAP+
GND
+
C1
LV
10F
INVERTED
NEGATIVE
OUTPUT
CAP–
SD
OUT
C2
SHUTDOWN
CONTROL
10F
+
The unloaded output voltage in this configuration is 2 (VIN).
Output resistance and ripple are similar to the voltage inverting
configuration.
Figure 6. ADM8660 Voltage Inverter Configuration
OSCILLATOR FREQUENCY
Note that the ADM8660 cannot be used in the voltage
doubling configuration.
The internal charge-pump frequency may be selected to be
either 25 kHz or 120 kHz using the Frequency Control (FC)
input. With FC unconnected (ADM660) or connected to GND
(ADM8660), the internal charge pump runs at 25 kHz while, if
FC is connected to V+, the frequency is increased by a factor of
five. Increasing the frequency allows smaller capacitors to be
used for equivalent performance or, if the capacitor size is un-
changed, it results in lower output impedance and ripple.
DOUBLED
POSITIVE
OUTPUT
FC
V+
OSC
+
ADM660
CAP+
10F
+
+2.5V
TO +7V
INPUT
10F
LV
GND
CAP–
OUT
Figure 8. Voltage Doubler Configuration
If a charge-pump frequency other than the two fixed values is
desired, this is made possible by the OSC input, which can
either have a capacitor connected to it or be overdriven by an
external clock. Refer to the Typical Performance Characteris-
tics, which shows the variation in charge-pump frequency versus
capacitor size. The charge-pump frequency is one-half the oscil-
lator frequency applied to the OSC pin.
Shutdown Input
The ADM8660 contains a shutdown input that can be used to
disable the device and thus reduce the power consumption. A
logic high level on the SD input shuts the device down reducing
the quiescent current to 0.3 µA. During shutdown, the output
voltage goes to 0 V. Therefore, ground referenced loads are not
powered during this state. When exiting shutdown, it takes
several cycles (approximately 500 µs) for the charge pump to
reach its final value. If the shutdown function is not being used,
then SD should be hardwired to GND.
If an external clock is used to overdrive the oscillator, its levels
should swing to within 100 mV of V+ and GND. A CMOS
driver is, therefore, suitable. When OSC is overdriven, FC has
no effect but LV must be grounded.
Capacitor Selection
Note that overdriving is permitted only in the voltage inverter
configuration.
The optimum capacitor value selection depends the charge-pump
frequency. With 25 kHz selected, 10 µF capacitors are recommended,
while with 120 kHz selected, 2.2 µF capacitors may be used.
Other frequencies allow other capacitor values to be used. For
maximum efficiency in all cases, it is recommended that capaci-
tors with low ESR are used for the charge-pump. Low ESR
capacitors give both the lowest output resistance and lowest
ripple voltage. High output resistance degrades the overall power
efficiency and causes voltage drops, especially at high output
Table I. ADM660 Charge-Pump Frequency Selection
FC
OSC
Charge Pump
C1, C2
Open
V+
Open
Open
25 kHz
120 kHz
See Typical Characteristics
10 µF
2.2 µF
Open or V+ Ext Cap
Open
Ext CLK Ext CLK Frequency/2
C
REV.
–8–
5秒后页面跳转
STM32H743技术深度剖析与应用案例探索
LM321中文资料解析：引脚功能介绍、技术特点、技术特性分析
74HC14芯片资料介绍：性能特性分析、引脚介绍
LM1875芯片手册：功放参数分析、引脚说明、电路设计要点
微信公众号
抖音公众号
浙公网安备 33010502006866号 浙ICP备10014259号-119
营业执照ICP证
数据手册
如果您发现信息不准确，
