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ADM1027ARQZ-RL71 PDF预览

ADM1027ARQZ-RL71

更新时间: 2022-03-04 06:41:03
品牌 Logo 应用领域
安森美 - ONSEMI 监视器控制器
页数 文件大小 规格书
56页 1815K
描述
dBCOOL™ Remote Thermal Controller and Voltage Monitor

ADM1027ARQZ-RL71 数据手册

 浏览型号ADM1027ARQZ-RL71的Datasheet PDF文件第47页浏览型号ADM1027ARQZ-RL71的Datasheet PDF文件第48页浏览型号ADM1027ARQZ-RL71的Datasheet PDF文件第49页浏览型号ADM1027ARQZ-RL71的Datasheet PDF文件第51页浏览型号ADM1027ARQZ-RL71的Datasheet PDF文件第52页浏览型号ADM1027ARQZ-RL71的Datasheet PDF文件第53页 
ADM1027  
Table XX. PWM Minimum Duty Cycle Registers  
Register Address  
R/W  
Description  
Power-On Default  
0x64  
0x65  
0x66  
Read/Write  
Read/Write  
Read/Write  
PWM1 Minimum Duty Cycle  
PWM2 Minimum Duty Cycle  
PWM3 Minimum Duty Cycle  
0x80 (50% duty cycle)  
0x80 (50% duty cycle)  
0x80 (50% duty cycle)  
Bit  
Name  
Read/Write  
Description  
<7:0>  
PWM Duty  
Read/Write  
These bits define the PWMMIN duty cycle for the PWMx output.  
0x00 = 0% duty cycle (fan off)  
0x40 = 25% duty cycle  
0x80 = 50% duty cycle  
0xFF = 100% duty cycle (fan full speed)  
These registers become read-only when the ADM1027 is in automatic fan control mode.  
Table XXI. TMIN Registers  
Register Address  
R/W  
Description  
Power-On Default  
0x67  
0x68  
0x69  
Read/Write  
Read/Write  
Read/Write  
Remote 1 Temperature TMIN  
Local Temperature TMIN  
Remote 2 Temperature TMIN  
0x5A (90oC)  
0x5A (90oC)  
0x5A (90oC)  
These are the TMIN registers for each temperature channel. When the temperature measured exceeds TMIN, the appropriate fan will  
run at minimum speed and increase with temperature according to TRANGE  
.
These registers become read-only when the Configuration Register 1 lock bit is set. Any further attempts to write to these registers  
will have no effect.  
Table XXII. Therm Limit Registers  
Register Address  
R/W  
Description  
Power-On Default  
0x6A  
0x6B  
0x6C  
Read/Write  
Read/Write  
Read/Write  
Remote 1 THERM Limit  
Local THERM Limit  
Remote 2 THERM Limit  
0x64 (100oC)  
0x64 (100oC)  
0x64 (100oC)  
If any temperature measured exceeds its THERM limit, all PWM outputs will drive their fans at 100% duty cycle. This is a fail-safe  
mechanism incorporated to cool the system in the event of a critical overtemperature. It also ensures some level of cooling in the  
event that software or hardware locks up. If set to 0x80, this feature is disabled. The PWM output will remain at 100% until the  
temperature drops below THERM limit – 4C .  
These registers become read-only when the Configuration Register 1 lock bit is set to 1. Any further attempts to write to these registers  
will have no effect.  
Table XXIII. Temperature Hysteresis Registers  
Register Address  
R/W  
Description  
Power-On Default  
0x6D  
0x6E  
Read/Write  
Read/Write  
Remote 1, Local Temperature Hysteresis  
Remote 2 Temperature Hysteresis  
0x44  
0x40  
Each 4-bit value controls the amount of temperature hysteresis applied to a particular temperature channel. Once the temperature for  
that channel falls below its TMIN value, the fan will remain running at PWMMIN duty cycle until the temperature = TMIN – hysteresis.  
Up to 15oC of hysteresis may be assigned to any temperature channel. Setting the hysteresis value lower than 4oC will cause the fan  
to switch on and off regularly when the temperature is close to TMIN  
.
These registers become read-only when the Configuration Register 1 lock bit is set to 1. Any further attempts to write to these registers  
will have no effect.  
Rev. 3 | Page 50 of 56 | www.onsemi.com  

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