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ADL5390ACPZ-WP PDF预览

ADL5390ACPZ-WP

更新时间: 2024-02-04 11:33:18
品牌 Logo 应用领域
罗彻斯特 - ROCHESTER 电信电信集成电路
页数 文件大小 规格书
25页 1769K
描述
SPECIALTY TELECOM CIRCUIT, QCC24, 4 X 4 MM, LEAD FREE, MO-220-VGGD-2, LFCSP-24

ADL5390ACPZ-WP 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Active零件包装代码:QFN
包装说明:HVQCCN,针数:24
Reach Compliance Code:unknown风险等级:5.67
JESD-30 代码:S-XQCC-N24JESD-609代码:e3
长度:4 mm湿度敏感等级:3
功能数量:1端子数量:24
最高工作温度:85 °C最低工作温度:-40 °C
封装主体材料:UNSPECIFIED封装代码:HVQCCN
封装形状:SQUARE封装形式:CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
峰值回流温度(摄氏度):260认证状态:COMMERCIAL
座面最大高度:1 mm标称供电电压:5 V
表面贴装:YES技术:BIPOLAR
电信集成电路类型:TELECOM CIRCUIT温度等级:INDUSTRIAL
端子面层:MATTE TIN端子形式:NO LEAD
端子节距:0.5 mm端子位置:QUAD
处于峰值回流温度下的最长时间:40宽度:4 mm
Base Number Matches:1

ADL5390ACPZ-WP 数据手册

 浏览型号ADL5390ACPZ-WP的Datasheet PDF文件第18页浏览型号ADL5390ACPZ-WP的Datasheet PDF文件第19页浏览型号ADL5390ACPZ-WP的Datasheet PDF文件第20页浏览型号ADL5390ACPZ-WP的Datasheet PDF文件第22页浏览型号ADL5390ACPZ-WP的Datasheet PDF文件第23页浏览型号ADL5390ACPZ-WP的Datasheet PDF文件第24页 
ADL5390  
Table 4. Evaluation Board Configuration Options  
Component  
Function  
Default Conditions  
R7, R9, R11, R14,  
R15, R19, R20,  
R21, C15, C19,  
W3, W4  
I Channel Baseband Interface. Resistors R7 and R9 may be installed to  
accommodate a baseband source that requires a specific terminating  
impedance. Capacitors C15 and C19 are bypass capacitors. For single-ended  
baseband drive, the Potentiometer R11 can be used to provide a bias level to  
the unused input (install either W3 or W4).  
R7, R9 = not installed  
R11 = potentiometer, 2 kΩ, 10 turn  
(Bourns)  
R14 = 4 kΩ (size 0603)  
R15 = 44 kΩ (size 0603)  
R19, R20, R21 = 0 Ω (size 0603)  
C15, C19 = 0.1 µF  
(Size 0603)  
W3 = jumper (installed)  
W4 = jumper (open)  
R1, R3, R10, R12,  
R13, R16, R17,  
R18, C16, C20,  
W1, W2  
Q Channel Baseband Interface. See the I Channel Baseband Interface section.  
R1, R3 = not installed  
R10 = potentiometer, 2 kΩ, 10 turn  
(Bourns)  
R12 = 4 kΩ (size 0603)  
R13 = 44 kΩ (size 0603)  
R16, R17, R18 = 0 Ω  
(size 0603)  
C16, C20 = 0.1 µF (size 0603)  
W1 = jumper (installed)  
W2 = jumper (open)  
C11, C12  
Baseband Low-Pass Filtering. By adding capacitor C11 between QFLP and  
QFLM, and capacitor C12 between IFLP and IFLM, the 3 dB low-pass corner  
frequency of the baseband interface can be reduced from 230 MHz (nominal)  
as given by the equation in the Evaluation Board section.  
C11, C12 = not installed  
T1, C17, C18, L3,  
L4  
Output Interface. The 1:1 balun transformer, T1, converts the 50 Ω differential  
output to 50 Ω single-ended. C17 and C18 are dc blocks. L3 and L4 provide dc  
bias for the output.  
C17, C18 = 10 nF (size 0603)  
T1 = ETC1-1-13 (M/A-COM)  
L3, L4 = 120 nH (size 0603)  
C2, C1, R2  
C5, C6, R22  
I and Q Channel RF Input Interface. The single-ended impedance to the  
ADL5390 RF inputs is 200 Ω. Shunt terminations R2 and R22 of 66.5 Ω bring the  
impedances to 50 Ω. C2 and C5 are dc blocks. C1 and C6 are used to ac-couple  
the unused side of the differential inputs to common.  
C2 = C1 = 10 nF (size 0603)  
R2 = 66.5 10 (size 0603)  
C5 = C6 = 10 nF (size 0603)  
R22 = 66.5 10 (size 0603)  
R4, R6, R5, C4, C7  
C9, C3, C8, C10  
Power Supply Decoupling.  
R4, R6, R5 = 0 (size 0603)  
C4, C7 C9 = 0.1uF (size 0603)  
C3, C8, C10 = 100 pF (size 0603)  
R8, SW1  
Output Disable Interface. The output stage of the ADL5390 is disabled by  
applying a high voltage to the DSOP pin by moving SW1 to Position B. The  
output stage is enabled moving SW1 to Position A. The output disable  
function can also be exercised by applying an external high or low voltage to  
the DSOP SMA connector with SW1 in Position A.  
R8 = 10 kΩ (size 0603)  
SW1 = SPDT (Position A, output  
enabled)  
Rev. 0 | Page 20 of 24  
 

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