Low Capacitance, Low Charge Injection,
± ±1 ꢀV/±ꢁ ꢀ iCMOS® Dual SPST Switches
ADG±ꢁꢁ±VADG±ꢁꢁꢁVADG±ꢁꢁ3
FEATURES
FUNCTIONAL BLOCK DIAGRAM
<0.5 pC charge injection over full signal range
Off capacitance: 2 pF
Off leakage: 20 pA
Supply range: 33 V
On resistance: 120 Ω
ADG1221
ADG1222
S1
D1
S1
D1
IN1
D2
S2
IN1
D2
S2
IN2
Fully specified at 15 V, +12 V
No VL supply required
IN2
3 V logic-compatible inputs
Rail-to-rail operation
10-lead MSOP package
ADG1223
APPLICATIONS
S1
D1
IN1
D2
S2
Automatic test equipment
Data acquisition systems
Battery-powered systems
Sample-and-hold systems
Audio signal routing
IN2
Video signal routing
Communication systems
SWITCHES SHOWN FOR A LOGIC 0 INPUT
Figure 1.
GENERAL DESCRIPTION
ADG1222. The ADG1223 has one switch with digital control
logic similar to that of the ADG1221; the logic is inverted on
the other switch. The ADG1223 exhibits break-before-make
switching action for use in multiplexer applications. Each
switch conducts equally well in both directions when on and
The ADG1221/ADG1222/ADG1223 are monolithic, complemen-
tary metal-oxide semiconductor (CMOS) devices containing
four independently selectable switches designed on an iCMOS
(industrial CMOS) process. iCMOS is a modular manufacturing
process combining high voltage CMOS and bipolar technologies.
It enables the development of a wide range of high performance
analog ICs, capable of 33 V operation, in a footprint that no
previous generation of high voltage parts has been able to achieve.
Unlike analog ICs using conventional CMOS processes, iCMOS
components can tolerate high supply voltages while providing
increased performance, dramatically lower power consumption,
and reduced package size.
has an input signal range that extends to the supplies. In the off
condition, signal levels up to the supplies are blocked.
0.5
T
= 25ºC
A
0.4
0.3
V
V
= +15V
= –15V
DD
SS
0.2
0.1
The ultralow capacitance and exceptionally low charge injection
of these switches make them ideal solutions for data acquisition
and sample-and-hold applications, where low glitch and fast
settling are required. Figure 2 shows that there is minimum
charge injection over the full signal range of the device.
0
V
V
= 12V
= 0V
DD
SS
–0.1
–0.2
–0.3
–0.4
–0.5
V
V
= +5V
= –5V
DD
SS
The ADG1221/ADG1222/ADG1223 contain two independent
single-pole/single-throw (SPST) switches. The ADG1221 and
ADG1222 differ only in that the digital control logic is inverted.
The ADG1221 switches are turned on with Logic 1 on the appro-
priate control input, and Logic 0 is required for the
–15
–10
–5
0
5
10
15
INPUT VOLTAGE (V)
Figure 2. Charge Injection vs. Input Voltage
Rev. A
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registeredtrademarks arethe property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700 www.analog.com
Fax: 781.461.3113 ©2007–2009 Analog Devices, Inc. All rights reserved.