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ADF7021-NBCPZ-RL7 PDF预览

ADF7021-NBCPZ-RL7

更新时间： 2024-02-16 11:08:27
品牌 Logo 应用领域
亚德诺 - ADI 电信电信集成电路
页数 文件大小 规格书
66页 1491K
描述
High Performance Narrow-Band Transceiver IC

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ADF7021-NBCPZ-RL7 技术参数

Source Url Status Check Date：2013-05-01 14:56:36.101是否无铅： 含铅
是否Rohs认证： 符合生命周期：Active
包装说明：HVQCCN, LCC48,.27SQ,20针数：48
Reach Compliance Code：compliant风险等级：1.62
JESD-30 代码：S-XQCC-N48JESD-609代码：e3
长度：7 mm湿度敏感等级：3
功能数量：1端子数量：48
最高工作温度：85 °C最低工作温度：-40 °C
封装主体材料：UNSPECIFIED封装代码：HVQCCN
封装等效代码：LCC48,.27SQ,20封装形状：SQUARE
封装形式：CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE峰值回流温度（摄氏度）：260
电源：2.5/3.3 V认证状态：Not Qualified
座面最大高度：1 mm子类别：Other Telecom ICs
标称供电电压：3 V表面贴装：YES
技术：CMOS电信集成电路类型：BASEBAND CIRCUIT
温度等级：INDUSTRIAL端子面层：Matte Tin (Sn)
端子形式：NO LEAD端子节距：0.5 mm
端子位置：QUAD处于峰值回流温度下的最长时间：NOT SPECIFIED
宽度：7 mmBase Number Matches：1

ADF7021-NBCPZ-RL7 数据手册

 浏览型号ADF7021-NBCPZ-RL7的Datasheet PDF文件第2页浏览型号ADF7021-NBCPZ-RL7的Datasheet PDF文件第3页浏览型号ADF7021-NBCPZ-RL7的Datasheet PDF文件第4页浏览型号ADF7021-NBCPZ-RL7的Datasheet PDF文件第5页浏览型号ADF7021-NBCPZ-RL7的Datasheet PDF文件第6页浏览型号ADF7021-NBCPZ-RL7的Datasheet PDF文件第7页 
High Performance  
Narrow-Band Transceiver IC  
ADF7021-N  
Data Sheet  
On-chip VCO and fractional-N PLL  
FEATURES  
On-chip, 7-bit ADC and temperature sensor  
Fully automatic frequency control loop (AFC)  
Digital received signal strength indication (RSSI)  
Integrated Tx/Rx switch  
Low power, narrow-band transceiver  
Frequency bands using dual VCO  
80 MHz to 650 MHz  
842 MHz to 916 MHz  
Programmable IF filter bandwidths of  
9 kHz, 13.5 kHz, and 18.5 kHz  
Modulation schemes: 2FSK, 3FSK, 4FSK, MSK  
Spectral shaping: Gaussian and raised cosine filtering  
Data rates supported: 0.05 kbps to 24 kbps  
2.3 V to 3.6 V power supply  
0.1 µA leakage current in power-down mode  
APPLICATIONS  
Narrow-band, short range device (SRD) standards  
ARIB STD-T67, ETSI EN 300 220, Korean SRD standard,  
FCC Part 15, FCC Part 90, FCC Part 95  
Low cost, wireless data transfer  
Remote control/security systems  
Wireless metering  
Wireless medical telemetry service (WMTS)  
Home automation  
Process and building control  
Programmable output power  
−16 dBm to +13 dBm in 63 steps  
Automatic power amplifier (PA) ramp control  
Receiver sensitivity  
−130 dBm at 100 bps, 2FSK  
−122 dBm at 1 kbps, 2FSK  
Pagers  
On-chip image rejection calibration  
FUNCTIONAL BLOCK DIAGRAM  
CE  
RSET  
MUXOUT  
CREG(1:4)  
TEMP  
SENSOR  
MUX  
7-BIT ADC  
R
LDO(1:4)  
TEST MUX  
LNA  
2FSK  
3FSK  
4FSK  
LNA  
TxRxCLK  
CLOCK  
AND DATA  
RECOVERY  
R
FIN  
RSSI/  
LOG AMP  
TxRxDATA  
Tx/Rx  
CONTROL  
IF FILTER  
R
FINB  
DEMODULATOR  
SWD  
GAIN  
AGC  
CONTROL  
SLE  
SERIAL  
PORT  
SDATA  
SREAD  
SCLK  
AFC  
CONTROL  
PA RAMP  
2FSK  
3FSK  
4FSK  
GAUSSIAN/  
RAISED COSINE  
FILTER  
Σ-Δ  
MODULATOR  
÷1/÷2  
DIV P  
N/N + 1  
RFOUT  
MOD CONTROL  
÷2  
VCO1  
3FSK  
ENCODING  
MUX  
CP  
PFD  
VCO2  
CLK  
DIV  
DIV R  
OSC  
L1 L2  
VCOIN CPOUT  
OSC1 OSC2  
CLKOUT  
Figure 1.  
Rev. B  
Document Feedback  
Information furnished by Analog Devices is believed to be accurate and reliable. However, no  
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other  
rightsof third parties that may result fromits use. Specifications subject to change without notice. No  
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.  
Trademarks andregisteredtrademarks are the property of their respective owners.  
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.  
Tel: 781.329.4700 ©2008–2016 Analog Devices, Inc. All rights reserved.  
Technical Support  
www.analog.com  
 
 
 
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