ADF7021-NDF

更新时间： 2024-01-03 12:30:38

品牌	Logo	应用领域
亚德诺 - ADI		/
页数	文件大小	规格书
64页	2499K
描述
High Performance Narrow-Band Transceiver IC

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ADF7021-NDF 技术参数

是否无铅：	含铅	是否Rohs认证：	符合
生命周期：	Active	零件包装代码：	QFN
包装说明：	HVQCCN, LCC48,.27SQ,20	针数：	48
Reach Compliance Code：	compliant	ECCN代码：	EAR99
HTS代码：	8542.39.00.01	风险等级：	5.16
JESD-30 代码：	S-XQCC-N48	JESD-609代码：	e3
长度：	7 mm	湿度敏感等级：	1
功能数量：	1	端子数量：	48
最高工作温度：	85 °C	最低工作温度：	-40 °C
封装主体材料：	UNSPECIFIED	封装代码：	HVQCCN
封装等效代码：	LCC48,.27SQ,20	封装形状：	SQUARE
封装形式：	CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE	峰值回流温度（摄氏度）：	225
电源：	2.5/3.3 V	认证状态：	Not Qualified
座面最大高度：	1 mm	子类别：	Other Telecom ICs
标称供电电压：	3 V	表面贴装：	YES
电信集成电路类型：	RF AND BASEBAND CIRCUIT	温度等级：	INDUSTRIAL
端子面层：	MATTE TIN	端子形式：	NO LEAD
端子节距：	0.5 mm	端子位置：	QUAD
处于峰值回流温度下的最长时间：	NOT SPECIFIED	宽度：	7 mm
Base Number Matches：	1

ADF7021-NDF 数据手册

High Performance

Narrow-Band Transceiver IC

ADF7021-N

On-chip VCO and fractional-N PLL

FEATURES

On-chip, 7-bit ADC and temperature sensor

Fully automatic frequency control loop (AFC)

Digital received signal strength indication (RSSI)

Integrated Tx/Rx switch

Low power, narrow-band transceiver

Frequency bands using dual VCO

80 MHz to 650 MHz

842 MHz to 916 MHz

Programmable IF filter bandwidths of

9 kHz, 13.5 kHz, and 18.5 kHz

Modulation schemes: 2FSK, 3FSK, 4FSK, MSK

Spectral shaping: Gaussian and raised cosine filtering

Data rates supported: 0.05 kbps to 24 kbps

2.3 V to 3.6 V power supply

0.1 μA leakage current in power-down mode

APPLICATIONS

Narrow-band, short range device (SRD) standards

ARIB STD-T67, ETSI EN 300 220, Korean SRD standard,

FCC Part 15, FCC Part 90, FCC Part 95

Low cost, wireless data transfer

Remote control/security systems

Wireless metering

Wireless medical telemetry service (WMTS)

Home automation

Process and building control

Programmable output power

−16 dBm to +13 dBm in 63 steps

Automatic power amplifier (PA) ramp control

Receiver sensitivity

−130 dBm at 100 bps, 2FSK

−122 dBm at 1 kbps, 2FSK

Pagers

Patent pending, on-chip image rejection calibration

FUNCTIONAL BLOCK DIAGRAM

RSET

MUXOUT

CREG(1:4)

TEMP

SENSOR

MUX

7-BIT ADC

LDO(1:4)

TEST MUX

LNA

2FSK

3FSK

4FSK

LNA

TxRxCLK

CLOCK

AND DATA

RECOVERY

FIN

RSSI/

LOG AMP

TxRxDATA

Tx/Rx

CONTROL

IF FILTER

FINB

DEMODULATOR

SWD

GAIN

AGC

CONTROL

SLE

SERIAL

PORT

SDATA

SREAD

SCLK

AFC

CONTROL

PA RAMP

2FSK

3FSK

4FSK

GAUSSIAN/

RAISED COSINE

FILTER

Σ-Δ

MODULATOR

÷1/÷2

DIV P

N/N + 1

RFOUT

MOD CONTROL

÷2

VCO1

3FSK

ENCODING

MUX

PFD

VCO2

CLK

DIV

DIV R

OSC

L1 L2

VCOIN CPOUT

OSC1 OSC2

CLKOUT

Figure 1.

Rev. 0

Information furnished by Analog Devices is believed to be accurate and reliable. However, no

responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other

rights of third parties that may result from its use. Specifications subject to change without notice. No

license is granted by implication or otherwise under any patent or patent rights of Analog Devices.

Trademarks and registeredtrademarks arethe property of their respective owners.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.

Tel: 781.329.4700

Fax: 781.461.3113

www.analog.com

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