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ADF4360-2BCPZ

更新时间： 2024-01-17 06:42:15
品牌 Logo 应用领域
亚德诺 - ADI 电信集成电路蜂窝电话电路电信电路信息通信管理
页数 文件大小 规格书
24页 589K
描述
Integrated Synthesizer and VCO

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中文翻译

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ADF4360-2BCPZ 技术参数

是否无铅： 含铅是否Rohs认证： 符合
生命周期：Obsolete零件包装代码：QFN
包装说明：HVQCCN, LCC24,.16SQ,20针数：24
Reach Compliance Code：unknownECCN代码：EAR99
HTS代码：8542.39.00.01风险等级：5.12
Is Samacsys：NJESD-30 代码：S-XQCC-N24
JESD-609代码：e3长度：4 mm
湿度敏感等级：3功能数量：1
端子数量：24最高工作温度：85 °C
最低工作温度：-40 °C封装主体材料：UNSPECIFIED
封装代码：HVQCCN封装等效代码：LCC24,.16SQ,20
封装形状：SQUARE封装形式：CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
峰值回流温度（摄氏度）：260电源：3.3 V
认证状态：Not Qualified座面最大高度：1 mm
子类别：Other Telecom ICs标称供电电压：3.3 V
表面贴装：YES技术：BICMOS
电信集成电路类型：BASEBAND CIRCUIT温度等级：INDUSTRIAL
端子面层：Matte Tin (Sn)端子形式：NO LEAD
端子节距：0.5 mm端子位置：QUAD
处于峰值回流温度下的最长时间：40宽度：4 mm
Base Number Matches：1

ADF4360-2BCPZ 数据手册

 浏览型号ADF4360-2BCPZ的Datasheet PDF文件第2页浏览型号ADF4360-2BCPZ的Datasheet PDF文件第3页浏览型号ADF4360-2BCPZ的Datasheet PDF文件第4页浏览型号ADF4360-2BCPZ的Datasheet PDF文件第5页浏览型号ADF4360-2BCPZ的Datasheet PDF文件第6页浏览型号ADF4360-2BCPZ的Datasheet PDF文件第7页 
Integrated Synthesizer and VCO  
Data Sheet  
ADF4360-2  
FEATURES  
GENERAL DESCRIPTION  
Output frequency range: 1850 MHz to 2170 MHz  
Divide-by-2 output  
3.0 V to 3.6 V power supply  
1.8 V logic compatibility  
Integer-N synthesizer  
Programmable dual-modulus prescaler 8/9, 16/17, 32/33  
Programmable output power level  
3-wire serial interface  
Analog and digital lock detect  
Hardware and software power-down mode  
The ADF4360-2 is a fully integrated integer-N synthesizer  
and voltage-controlled oscillator (VCO). The ADF4360-2 is  
designed for a center frequency of 2000 MHz. In addition, a  
divide-by-2 option is available, whereby the user gets an RF  
output of between 925 MHz and 1085 MHz.  
Control of all the on-chip registers is through a simple 3-wire  
interface. The device operates with a power supply ranging  
from 3.0 V to 3.6 V and can be powered down when not in use.  
APPLICATIONS  
Wireless handsets (DECT, GSM, PCS, DCS, WCDMA)  
Test equipment  
Wireless LANs  
CATV equipment  
FUNCTIONAL BLOCK DIAGRAM  
AV  
DV  
CE  
R
DD  
DD  
SET  
ADF4360-2  
MUXOUT  
MULTIPLEXER  
14-BIT R  
COUNTER  
REF  
IN  
LOCK  
DETECT  
MUTE  
CLK  
DATA  
LE  
24-BIT  
FUNCTION  
LATCH  
24-BIT  
DATA REGISTER  
CHARGE  
PUMP  
CP  
PHASE  
COMPARATOR  
V
V
VCO  
TUNE  
C
C
C
N
INTEGER  
REGISTER  
RF  
RF  
A
B
OUT  
OUT  
VCO  
CORE  
OUTPUT  
STAGE  
13-BIT B  
COUNTER  
LOAD  
LOAD  
5-BIT A  
COUNTER  
PRESCALER  
P/P+1  
N = (BP + A)  
÷2  
DIVSEL = 1  
DIVSEL = 2  
CPGND  
AGND  
DGND  
Figure 1.  
Rev. C  
Document Feedback  
Information furnished by Analog Devices is believed to be accurate and reliable. However, no  
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other  
rights of third parties that may result from its use. Specifications subject to change without notice. No  
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.  
Trademarks and registered trademarks are the property of their respective owners.  
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.  
Tel: 781.329.4700 ©2004–2012 Analog Devices, Inc. All rights reserved.  
Technical Support  
www.analog.com  
 
 
 
 
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中文翻译

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ADF4360-2BCPZ 替代型号

型号 品牌 替代类型 描述 数据表
ADF4360-2BCPRL7 ADI

功能相似

 IC TELECOM, CELLULAR, BASEBAND CIRCUIT, QCC24, 4 X 4 MM, MO-220-VGGD-2, LFCSP-24, Cellular
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完全替代

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ADF4360-2BCP ADI

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