Datasheet > ADF4360-2_12

ADF4360-2_12

更新时间： 2022-04-13 01:03:50

品牌	Logo	应用领域
亚德诺 - ADI		/
页数	文件大小	规格书
24页	589K
描述
Integrated Synthesizer and VCO

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ADF4360-2_12 数据手册

Data Sheet

ADF4360-2

SPECIFICATIONS¹

AV_DD= DV_DD= V_VCO= 3.3 V 10%; AGND = DGND = 0 V; T_A= T_MINto T_MAX, unless otherwise noted.

Table 1.

Parameter

B Version

Unit

Conditions/Comments

REF_INCHARACTERISTICS

REF_INInput Frequency

10/250

MHz min/max

For f < 10 MHz, use a CMOS-compatible

square wave, slew rate > 21 V/µs

REF_INInput Sensitivity

0.7/AV_DD

0 to AV_DD

5.0

V p-p min/max

V max

pF max

AC-coupled

CMOS-compatible

REF_INInput Capacitance

REF_INInput Current

PHASE DETECTOR

Phase Detector Frequency²

CHARGE PUMP

100

µA max

MHz max

I_CPSink/Source³

With R_SET= 4.7 kΩ

High Value

Low Value

R_SETRange

2.5

mA typ

kΩ

nA typ

% typ

0.312

2.7/10

0.2

1.5

I_CPThree-State Leakage Current

Sink and Source Current Matching

I_CPvs. V_CP

I_CPvs. Temperature

LOGIC INPUTS

1.25 V ≤ V_CP≤ 2.5 V

V_CP= 2.0 V

V_INH, Input High Voltage

V_INL, Input Low Voltage

I_INH/I_INL, Input Current

C_IN, Input Capacitance

LOGIC OUTPUTS

1.5

0.6

V min

V max

µA max

pF max

3.0

V_OH, Output High Voltage

I_OH, Output High Current

V_OL, Output Low Voltage

POWER SUPPLIES

AV_DD

DV_DD− 0.4

500

0.4

V min

µA max

V max

CMOS output chosen

I_OL= 500 µA

3.0/3.6

AV_DD

V min/V max

DV_DD

V_VCO

AI_DD

DI_DD

mA typ

µA typ

2.5

4, 5

I_VCO

24.0

29.0

3.5 to 11.0

I_CORE= 15 mA

I_CORE= 20 mA

RF output stage is programmable

4, 5

I_VCO

I_RFOUT

Low Power Sleep Mode⁴

Rev. C | Page 3 of 24

1 234 5 6 7...24

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