a
Preliminary Technical Data
Dual PLL Frequency Synthesizer
ADF4216/ADF4217/ADF4218
FEATURES
GE NE RAL D E SC RIP T IO N
ADF4216:
ADF4217:
ADF4218:
+2.7 V to +5.5 V Pow er Supply
Selectable Charge Pum p Currents
Selectable Dual Modulus Prescaler
3-Wire Serial Interface
550MHz/ 1.2GHz
550MHz/ 2.0GHz
550MHz/ 2.5GHz
T he ADF4216/ADF4217/ADF4218 is a dual frequency
synthesizer which can be used to implement local oscil-
lators in the up-conversion and down-conversion sec-
tions of wireless receivers and transmitters. T hey can
provide the LO for both the RF and IF sections. T hey
consist of a low-noise digital PFD (Phase Frequency
Detector), a precision charge pump, a programmable
reference divider, programmable A and B counters and a
dual-modulus prescaler (P/P+1). T he A (6-bit) and B
(11-bit) counters, in conjunction with the dual modulus
prescaler (P/P+1), implement an N divider (N= BP+A).
In addition, the 14-bit reference counter (R Counter),
allows selectable REFIN frequencies at the PFD input.
A complete PLL (Phase-Locked Loop) can be imple-
mented if the synthesizers are used with an external loop
filter and VCO's (Voltage Controlled Oscillators)
Pow er Dow n Mode
APPLICATIONS
Portable Wireless Com m unications (PCS/ PCN, Cordless)
Cordless and Cellular Telephone System s
Wireless Local Area Netw orks (WLANs)
Cable TV Tuners (CATV)
Pagers
Control of all the on-chip registers is via a simple 3-wire
interface.
T he devices operate with a 3V ( ± 10%) or 5V( ± 10%)
power supply and can be powered down when not in
use.
FUNCTIO NAL BLO CK D IAGRAM
V
1
V
2
V
1
V 2
P
CC
CC
P
ADF4216/ADF4217/ADF4218
SWALLOW
CONTROL
17-B IT IF
N -COUNTER
IFIN
A
+
-
IF
PR ESC ALE
R
IFIN
B
CHARGE
PUMP
CP
IF
PH A S
E
C OM P A R A TOR
14-BIT IF
R-C OUNTER
IF
LOCK
DETECT
OSCILLATOR
REFIN
OUTPUT
M UX
MUXOUT
CLOCK
DATA
LE
22-BIT
DAT A
REGISTER
SDOUT
RF
LOCK
DETECT
17-BIT R F
N-C OUNTER
+
RFINA
RF INB
R F
PRESC ALE
R
-
CHARGE
PU MP
CP
RF
14-BIT RF
R-C OUNTER
PH A S
E
C OM P A R A TOR
SWALLOW
CONTROL
DGND
AGND
DGND
DGND
AGND
IF
RF
RF
IF
IF
REV.PrD 7/99
© Analog Devices, Inc., 1999
Inform ation furnished by Analog Devices is believed to be accurate and reliable.
However, no responsibility is assum ed by Analog Devices for its use, nor for any
infringem ents of patents or other rights of third parties which m ay result from its use.
No license is granted by im plication or otherwise under any patent or patent rights of
Analog Devices.
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