Datasheet > ADF4217LBRUZ

ADF4217LBRUZ

更新时间： 2024-01-22 05:16:13

品牌	Logo	应用领域
亚德诺 - ADI		光电二极管
页数	文件大小	规格书
24页	273K
描述
IC PLL FREQUENCY SYNTHESIZER, 3000 MHz, PDSO20, MO-153AC, TSSOP-20, PLL or Frequency Synthesis Circuit

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ADF4217LBRUZ 数据手册

ADF4217L/ADF4218L/ADF4219L

= 5V

= 4mA

–2

–4

–6

0.5

1.0

1.5

2.0

2.5

– V

3.0

3.5

4.0

4.5

5.0

TPC 13. Charge Pump Output Characteristics

CIRCUIT DESCRIPTION

Reference Input Section

Prescaler

The dual modulus prescaler (P/P + 1), along with the A and

B counters, enables the large division ratio, N, to be realized

(N = BP + A). This prescaler, operating at CML levels, takes

the clock from the IF/RF input stage and divides it down to a

manageable frequency for the CMOS A and B counters. It is

based on a synchronous 4/5 core.

The reference input stage is shown in Figure 2. SW1 and SW2

are normally closed switches; SW3 is normally open. When

power-down is initiated, SW3 is closed and SW1 and SW2 are

opened. This ensures that there is no loading of the REF_INpin

on power-down.

The prescaler is selectable. On the IF side, it can be set to either 8/9

(DB20 of the IF AB Counter Latch set to 0) or 16/17 (DB20 set

to 1). On the RF side of the ADF4217L/ADF4218L, it can be set

to 64/65 or 32/33. On the ADF4219L, the RF prescaler can be

set to 16/17 or 32/33. See Tables V, VI, VIII, and IX.

POWER-DOWN

CONTROL

50k⍀

SW2

REF

TO R

COUNTER

BUFFER

A AND B COUNTERS

SW1

The A and B CMOS counters combine with the dual modulus

prescaler to allow a wide ranging division ratio in the PLL feed-

back counter. The devices are guaranteed to work when the

prescaler output is 188 MHz or less. Typically they will work

with 250 MHz output from the prescaler.

SW3

NC = NORMALLY CLOSED

NO = NORMALLY OPEN

Figure 2. Reference Input Stage

IF/RF Input Stage

The IF/RF input stage is shown in Figure 3. It is followed by a

two-stage limiting amplifier to generate the CML clock levels

needed for the prescaler.

N = BP + A

TO PFD

11(13)-BIT

B COUNTER

LOAD

1.6V

PRESCALER

P/P+1

BIAS

GENERATOR

FROM IF/RF

INPUT STAGE

6(5)-BIT

A COUNTER

MODULUS

CONTROL

500⍀

Figure 4. Reference Input Stage, A and B Counters

AGND

Figure 3. IF/RF Input Stage

REV. C

–9–

1...6 7 8910 11 12...24

中文翻译

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与ADF4217LBRUZ相关器件

型号	品牌	获取价格	描述	数据表
ADF4217LBRUZ-RL	ADI	获取价格	暂无描述
ADF4217LBRUZ-RL7	ADI	获取价格	IC PLL FREQUENCY SYNTHESIZER, 3000 MHz, PDSO20, MO-153AC, TSSOP-20, PLL or Frequency Synth
ADF4218	ADI	获取价格	Dual RF PLL Frequency Synthesizers
ADF4218BCHIPS	ADI	获取价格	IC PLL FREQUENCY SYNTHESIZER, 2500 MHz, UUC, DIE, PLL or Frequency Synthesis Circuit
ADF4218BRU	ADI	获取价格	Dual RF PLL Frequency Synthesizers
ADF4218BRU-REEL	ADI	获取价格	IC PLL FREQUENCY SYNTHESIZER, 2500 MHz, PDSO20, TSSOP-20, PLL or Frequency Synthesis Circu
ADF4218BRU-REEL7	ADI	获取价格	IC PLL FREQUENCY SYNTHESIZER, 2500 MHz, PDSO20, TSSOP-20, PLL or Frequency Synthesis Circu
ADF4218L	ADI	获取价格	Dual Low Power Frequency Synthesizers
ADF4218L_15	ADI	获取价格	Dual Low Power Frequency Synthesizers
ADF4218LBCC	ADI	获取价格	暂无描述

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