Datasheet > 信号电路 > 锁相环或频率合成电路> ADF4210BRU

ADF4210BRU

更新时间： 2024-02-01 15:09:01

品牌	Logo	应用领域
亚德诺 - ADI		/
页数	文件大小	规格书
20页	252K
描述
Dual RF/IF PLL Frequency Synthesizers

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技术参数
数据手册

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ADF4210BRU 技术参数

是否Rohs认证：	不符合	生命周期：	Obsolete
零件包装代码：	TSSOP	包装说明：	TSSOP-20
针数：	20	Reach Compliance Code：	not_compliant
ECCN代码：	5A991.B	HTS代码：	8542.39.00.01
风险等级：	5.69	模拟集成电路 - 其他类型：	PLL FREQUENCY SYNTHESIZER
JESD-30 代码：	R-PDSO-G20	JESD-609代码：	e0
长度：	6.5 mm	功能数量：	1
端子数量：	20	最高工作温度：	85 °C
最低工作温度：	-40 °C	封装主体材料：	PLASTIC/EPOXY
封装代码：	TSSOP	封装等效代码：	TSSOP20,.25
封装形状：	RECTANGULAR	封装形式：	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
峰值回流温度（摄氏度）：	NOT SPECIFIED	电源：	3/5 V
认证状态：	Not Qualified	座面最大高度：	1.1 mm
子类别：	PLL or Frequency Synthesis Circuits	最大供电电流 (Isup)：	3 mA
最大供电电压 (Vsup)：	5.5 V	最小供电电压 (Vsup)：	2.7 V
标称供电电压 (Vsup)：	3 V	表面贴装：	YES
技术：	CMOS	温度等级：	INDUSTRIAL
端子面层：	Tin/Lead (Sn/Pb)	端子形式：	GULL WING
端子节距：	0.65 mm	端子位置：	DUAL
处于峰值回流温度下的最长时间：	NOT SPECIFIED	宽度：	4.4 mm
Base Number Matches：	1

ADF4210BRU 数据手册

ADF4210/ADF4211/ADF4212/ADF4213

PHASE FREQUENCY DETECTOR (PFD) AND CHARGE

PUMP

Lock Detect

MUXOUT can be programmed for two types of lock detect:

Digital Lock Detect and Analog Lock Detect. Digital Lock

Detect is active high. It is set high when the phase error on three

consecutive Phase Detector cycles is less than 15 ns. It will stay

set high until a phase error of greater than 25 ns is detected on

any subsequent PD cycle. The N-channel open-drain analog

lock detect should be operated with an external pull-up resistor

of 10 kΩ nominal. When lock has been detected, it is high with

narrow low-going pulses.

The PFD takes inputs from the R counter and N counter and

produces an output proportional to the phase and frequency

difference between them. Figure 5 is a simpliﬁed schematic.

The PFD includes a ﬁxed-delay element that sets the width of

the antibacklash pulse. This is typically 3 ns. This pulse ensures

that there is no deadzone in the PFD transfer function and gives

a consistent reference spur level.

CHARGE

PUMP

RF/IF INPUT SHIFT REGISTER

The ADF421x family digital section includes a 24-bit input shift

prising a 6-bit IF A counter and a 12-bit IF B counter. Also

present is a 14-bit RF R counter and an 18-bit RF N counter,

comprising a 6-bit RF A counter and a 12-bit RF B counter.

Data is clocked into the 24-bit shift register on each rising edge

of CLK. The data is clocked in MSB ﬁrst. Data is transferred

from the shift register to one of four latches on the rising edge of

LE. The destination latch is determined by the state of the two

control bits (C2, C1) in the shift register. These are the two LSBs

DB1, DB0 as shown in the timing diagram of Figure 1. The

truth table for these bits is shown in Table VI. Table I shows a

summary of how the latches are programmed.

R DIVIDER

CLR1

DELAY

CLR2

DOWN

Table I. C2, C1 Truth Table

Control Bits

N DIVIDER

CPGND

R DIVIDER

N DIVIDER

Data Latch

IF R Counter

IF AB Counter (A and B)

RF R Counter

RF AB Counter (A and B)

CP OUTPUT

Figure 5. RF/IF PFD Simpliﬁed Schematic and Timing

(In Lock)

MUXOUT AND LOCK DETECT

The output multiplexer on the ADF421x family allows the

user to access various internal points on the chip. The state of

MUXOUT is controlled by P3, P4, P11, and P12. See Tables

III and V. Figure 6 shows the MUXOUT section in block dia-

gram form.

IF ANALOG LOCK DETECT

IF R COUNTER OUTPUT

IF N COUNTER OUTPUT

IF/RF ANALOG LOCK DETECT

RF R COUNTER OUTPUT

RF N COUNTER OUTPUT

RF ANALOG LOCK DETECT

DIGITAL LOCK DETECT

MUXOUT

MUX

CONTROL

DGND

Figure 6. MUXOUT Circuit

–10–

REV. A

1...7 8 91011 12 13...20

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与ADF4210BRU相关器件

型号	品牌	描述	获取价格	数据表
ADF4210BRU-REEL	ADI	IC PLL FREQUENCY SYNTHESIZER, 1200 MHz, PDSO20, TSSOP-20, PLL or Frequency Synthesis Circu	获取价格
ADF4210BRU-REEL7	ADI	IC PLL FREQUENCY SYNTHESIZER, 1200 MHz, PDSO20, TSSOP-20, PLL or Frequency Synthesis Circu	获取价格
ADF4211	ADI	Dual RF/IF PLL Frequency Synthesizers	获取价格
ADF4211_15	ADI	Dual RF/IF PLL Frequency Synthesizers	获取价格
ADF4211BCP	ADI	Dual RF/IF PLL Frequency Synthesizers	获取价格
ADF4211BCP-REEL	ADI	IC PLL FREQUENCY SYNTHESIZER, 2000 MHz, QCC20, CSP-20, PLL or Frequency Synthesis Circuit	获取价格

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