Datasheet > ADCLK954BCPZ-REEL7

ADCLK954BCPZ-REEL7

更新时间： 2024-01-10 08:19:53

品牌	Logo	应用领域
亚德诺 - ADI		半导体逻辑集成电路驱动时钟
页数	文件大小	规格书
12页	294K
描述
Two Selectable Inputs, 12 LVPECL Outputs, SiGe Clock Fanout Buffer

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ADCLK954BCPZ-REEL7 数据手册

ADCLK954

TABLE OF CONTENTS

Features .............................................................................................. 1

Thermal Performance...................................................................5

Pin Configuration and Function Descriptions..............................6

Typical Performance Characteristics..............................................7

Functional Description.....................................................................9

Clock Inputs...................................................................................9

Clock Outputs................................................................................9

PCB Layout Considerations...................................................... 10

Input Termination Options........................................................11

Outline Dimensions....................................................................... 12

Ordering Guide .......................................................................... 12

Applications....................................................................................... 1

General Description......................................................................... 1

Functional Block Diagram .............................................................. 1

Revision History ............................................................................... 2

Specifications..................................................................................... 3

Electrical Characteristics............................................................. 3

Absolute Maximum Ratings............................................................ 5

Determining Junction Temperature .......................................... 5

ESD Caution.................................................................................. 5

REVISION HISTORY

7/09—Rev. 0 to Rev. A

Changes to Table 1............................................................................ 3

Changes to Negative Supply Current, Table 4............................... 4

Changes to Positive Supply Current, Table 4 ................................ 4

Changes to Figure 10........................................................................ 8

1/09—Revision 0: Initial Version

Rev. A | Page 2 of 12

123 4 5 6 7...12

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