Datasheet > ADCLK954BCPZ-REEL7

ADCLK954BCPZ-REEL7

更新时间： 2024-02-24 03:42:34

品牌	Logo	应用领域
亚德诺 - ADI		半导体逻辑集成电路驱动时钟
页数	文件大小	规格书
12页	294K
描述
Two Selectable Inputs, 12 LVPECL Outputs, SiGe Clock Fanout Buffer

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ADCLK954BCPZ-REEL7 数据手册

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ADCLK954

OUTLINE DIMENSIONS

6.00

BSC SQ

0.60 MAX

PIN 1

INDICATOR

0.50

BSC

PIN 1

INDICATOR

3.05

2.90 SQ

2.75

5.75

BSC SQ

EXPOSED

PAD

0.50

0.40

0.30

0.25 MIN

BOTTOM VIEW

TOP VIEW

0.80 MAX

0.65 TYP

4.50

REF

12° MAX

1.00

0.85

0.80

0.05 MAX

0.02 NOM

COPLANARITY

0.08

FOR PROPER CONNECTION OF

THE EXPOSED PAD, REFER TO

THE PIN CONFIGURATION AND

FUNCTION DESCRIPTIONS

0.30

0.23

0.18

SEATING

PLANE

0.20 REF

SECTION OF THIS DATA SHEET.

COMPLIANT TO JEDEC STANDARDS MO-220-VJJD-2

Figure 23. 40-Lead Lead Frame Chip Scale Package [LFSCP_VQ]

6 mm × 6 mm Body, Very Thin Quad

(CP-40-8)

Dimensions shown in millimeters

ORDERING GUIDE

Model

ADCLK954BCPZ¹

ADCLK954BCPZ-REELꢀ¹

ADCLK954/PCBZ¹

Temperature Range

−40°C to +85°C

Package Description

40-Lead LFCSP_VQ

Evaluation Board

Package Option

CP-40-8

¹Z = RoHS Compliant Part.

registered trademarks are the property of their respective owners.

D07968-0-7/09(A)

Rev. A | Page 12 of 12

1...9 10 1112

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