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ADC12C105 PDF预览

ADC12C105

更新时间: 2024-09-27 11:15:15
品牌 Logo 应用领域
德州仪器 - TI 转换器模数转换器
页数 文件大小 规格书
34页 910K
描述
12 位、105MSPS、1.0GHz 输入带宽模数转换器 (ADC)

ADC12C105 数据手册

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ADC12C105  
www.ti.com  
SNAS417C MAY 2007REVISED APRIL 2013  
ADC12C105 12-Bit, 95/105 MSPS A/D Converter  
Check for Samples: ADC12C105  
1
FEATURES  
DESCRIPTION  
The ADC12C105 is  
a high-performance CMOS  
2
1 GHz Full Power Bandwidth  
analog-to-digital converter capable of converting  
analog input signals into 12-bit digital words at rates  
up to 105 Mega Samples Per Second (MSPS). This  
converter uses a differential, pipelined architecture  
with digital error correction and an on-chip sample-  
and-hold circuit to minimize power consumption and  
the external component count, while providing  
excellent dynamic performance. A unique sample-  
and-hold stage yields a full-power bandwidth of 1  
GHz. The ADC12C105 may be operated from a  
single +3.0V or +3.3V power supply and consumes  
low power.  
Internal Reference and Sample-and-Hold  
Circuit  
Low Power Consumption  
Data Ready Output Clock  
Clock Duty Cycle Stabilizer  
Single +3.0V or +3.3V Supply Operation  
Power-Down Mode  
32-Pin WQFN Package, (5x5x0.8mm, 0.5mm  
Pin-Pitch)  
A separate +2.5V supply may be used for the digital  
output interface which allows lower power operation  
with reduced noise. A power-down feature reduces  
the power consumption to very low levels while still  
allowing fast wake-up time to full operation. The  
differential inputs accept a 2V full scale differential  
input swing. A stable 1.2V internal voltage reference  
is provided, or the ADC12C105 can be operated with  
an external 1.2V reference. Output data format (offset  
binary versus 2's complement) and duty cycle  
stabilizer are pin-selectable. The duty cycle stabilizer  
maintains performance over a wide range of clock  
duty cycles.  
APPLICATIONS  
High IF Sampling Receivers  
Wireless Base Station Receivers  
Test and Measurement Equipment  
Communications Instrumentation  
Portable Instrumentation  
KEY SPECIFICATIONS  
Resolution: 12 Bits  
Conversion Rate: 105 MSPS  
SNR: (fIN = 240 MHz) 69 dBFS (typ)  
SFDR: (fIN = 240 MHz) 82 dBFS (typ)  
Full Power Bandwidth: 1 GHz (typ)  
Power Consumption:  
The ADC12C105 is available in a 32-lead WQFN  
package and operates over the industrial temperature  
range of 40°C to +85°C.  
350 mW (typ), VA=3.0 V  
400 mW (typ), VA=3.3 V  
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
2
All trademarks are the property of their respective owners.  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  
Copyright © 2007–2013, Texas Instruments Incorporated  

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