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ADC12C105CISQE PDF预览

ADC12C105CISQE

更新时间： 2024-02-03 10:35:59
品牌 Logo 应用领域
美国国家半导体 - NSC 转换器
页数 文件大小 规格书
24页 450K
描述
12-Bit, 95/105 MSPS A/D Converter

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中文翻译

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ADC12C105CISQE 技术参数

是否Rohs认证： 不符合生命周期：Obsolete
包装说明：QCCN, LCC32,.2SQ,20Reach Compliance Code：compliant
风险等级：5.89最大模拟输入电压：4.2 V
转换器类型：A/D CONVERTERJESD-30 代码：S-PQCC-N32
JESD-609代码：e0最大线性误差 (EL)：0.029%
湿度敏感等级：2位数：12
功能数量：1端子数量：32
最高工作温度：85 °C最低工作温度：-40 °C
输出位码：OFFSET 2'S COMPLEMENT, 2'S COMPLEMENT封装主体材料：PLASTIC/EPOXY
封装代码：QCCN封装等效代码：LCC32,.2SQ,20
封装形状：SQUARE封装形式：CHIP CARRIER
电源：3.3 V认证状态：Not Qualified
子类别：Analog to Digital Converters标称供电电压：3.3 V
表面贴装：YES技术：CMOS
温度等级：INDUSTRIAL端子面层：Tin/Lead (Sn85Pb15)
端子形式：NO LEAD端子节距：0.5 mm
端子位置：QUADBase Number Matches：1

ADC12C105CISQE 数据手册

 浏览型号ADC12C105CISQE的Datasheet PDF文件第2页浏览型号ADC12C105CISQE的Datasheet PDF文件第3页浏览型号ADC12C105CISQE的Datasheet PDF文件第4页浏览型号ADC12C105CISQE的Datasheet PDF文件第5页浏览型号ADC12C105CISQE的Datasheet PDF文件第6页浏览型号ADC12C105CISQE的Datasheet PDF文件第7页 
August 2007  
ADC12C105  
12-Bit, 95/105 MSPS A/D Converter  
General Description  
Features  
The ADC12C105 is a high-performance CMOS analog-to-  
digital converter capable of converting analog input signals  
into 12-bit digital words at rates up to 105 Mega Samples Per  
Second (MSPS). This converter uses a differential, pipelined  
architecture with digital error correction and an on-chip sam-  
ple-and-hold circuit to minimize power consumption and the  
external component count, while providing excellent dynamic  
performance. A unique sample-and-hold stage yields a full-  
power bandwidth of 1 GHz. The ADC12C105 may be oper-  
ated from a single +3.0V or +3.3V power supply and  
consumes low power.  
1 GHz Full Power Bandwidth  
■
■
■
■
■
■
■
■
Internal reference and sample-and-hold circuit  
Low power consumption  
Data Ready output clock  
Clock Duty Cycle Stabilizer  
Single +3.0V or +3.3V supply operation  
Power-down mode  
32-pin LLP package, (5x5x0.8mm, 0.5mm pin-pitch)  
Key Specifications  
A separate +2.5V supply may be used for the digital output  
interface which allows lower power operation with reduced  
noise. A power-down feature reduces the power consumption  
to very low levels while still allowing fast wake-up time to full  
operation. The differential inputs accept a 2V full scale differ-  
ential input swing. A stable 1.2V internal voltage reference is  
provided, or the ADC12C105 can be operated with an exter-  
nal 1.2V reference. Output data format (offset binary versus  
2's complement) and duty cycle stabilizer are pin-selectable.  
The duty cycle stabilizer maintains performance over a wide  
range of clock duty cycles.  
Resolution  
Conversion Rate  
SNR (fIN = 240 MHz)  
SFDR (fIN = 240 MHz)  
Full Power Bandwidth  
Power Consumption  
12 Bits  
105 MSPS  
69 dBFS (typ)  
82 dBFS (typ)  
1 GHz (typ)  
■
■
■
■
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350 mW (typ), VA=3.0V  
400 mW (typ), VA=3.3V  
■
■
Applications  
The ADC12C105 is available in a 32-lead LLP package and  
operates over the industrial temperature range of −40°C to  
+85°C.  
High IF Sampling Receivers  
■
■
■
■
Wireless Base Station Receivers  
Test and Measurement Equipment  
Communications Instrumentation  
Portable Instrumentation  
■
Connection Diagram  
30023101  
© 2007 National Semiconductor Corporation  
300231  
www.national.com  
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与ADC12C105CISQE相关器件

型号 品牌 获取价格 描述 数据表
ADC12C105CISQE/NOPB TI

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 		12 位、105MSPS、1.0GHz 输入带宽模数转换器 (ADC) | RTV | 3
ADC12C105CISQX TI

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 		IC,A/D CONVERTER,SINGLE,12-BIT,CMOS,LLCC,32PIN
ADC12C105EB NSC

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 		12-Bit, 95/105 MSPS A/D Converter
ADC12C170 NSC

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 		12-Bit, 170 MSPS, 1.1 GHz Bandwidth A/D Converter with CMOS outputs
ADC12C170 TI

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 		12 位、170MSPS、1.1GHz 输入带宽模数转换器 (ADC)
ADC12C170_0705 NSC

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 		12-Bit, 170 MSPS, 1.1 GHz Bandwidth A/D Converter with CMOS outputs
ADC12C170_0708 NSC

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 		12-Bit, 170 MSPS, 1.1 GHz Bandwidth A/D Converter with CMOS Outputs
ADC12C170CISQ NSC

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 		12-Bit, 170 MSPS, 1.1 GHz Bandwidth A/D Converter with CMOS outputs
ADC12C170CISQ/NOPB TI

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 		12 位、170MSPS、1.1GHz 输入带宽模数转换器 (ADC) | RHS | 4
ADC12C170HFEB NSC

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 		12-Bit, 170 MSPS, 1.1 GHz Bandwidth A/D Converter with CMOS outputs

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