ADC12D1000, ADC12D1600
www.ti.com
SNAS480M –MAY 2010–REVISED MARCH 2013
ADC12D1000/ADC12D1600 12-Bit, 2.0/3.2 GSPS Ultra High-Speed ADC
Check for Samples: ADC12D1000, ADC12D1600
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FEATURES
KEY SPECIFICATIONS
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Configurable to Either 2.0/3.2 GSPS
Interleaved or 1.0/1.6 GSPS Dual ADC
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Resolution: 12 Bits
Interleaved 2.0/3.2 GSPS ADC
Pin-compatible with ADC10D1x00 and
ADC12D1x00
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Noise Floor: -152.6/-153.6 dBm/Hz (typ)
IMD3: -66/-63 dBFS (typ)
Internally Terminated, Buffered, Differential
Analog Inputs
Noise Power Ratio: 49.5/48.5 dB (typ)
Power: 3.38/3.88 W (typ)
Interleaved Timing Automatic and Manual
Skew Adjust
Full Power Bandwidth: 1.75/1.75 GHz (typ)
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Dual 1.0/1.6 GSPS ADC, Fin = 125 MHz
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Test Patterns at Output for System Debug
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ENOB: 9.6/9.4 Bits (typ)
Programmable 15-bit Gain and 12-bit Plus Sign
Offset
SNR: 60.2/58.5 dB (typ)
Power: 3.38/3.88W (typ)
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Programmable tAD Adjust Feature
Full Power Bandwidth: 2.8/2.8GHz (typ)
1:1 Non-demuxed or 1:2 Demuxed LVDS
Outputs
DESCRIPTION
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AutoSync Feature for Multi-chip Systems
Single 1.9V ± 0.1V Power Supply
The 12-bit, 2.0/3.2 GSPS ADC12D1000/1600 is the
latest advance in TI's Ultra High-Speed ADC family
and builds upon the features, architecture and
functionality of the 10-bit GHz family of ADCs.
APPLICATIONS
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Wideband Communications
Data Acquisition Systems
RADAR/LIDAR
The ADC12D1000/1600 provides a flexible LVDS
interface which has multiple SPI programmable
options to facilitate board design and FPGA/ASIC
data capture. The LVDS outputs are compatible with
IEEE 1596.3-1996 and support programmable
common mode voltage.
Set-top Box
Consumer RF
Software Defined Radio
The ADC12D1000/1600 is packaged in a leaded or
lead-free 292-ball thermally enhanced BGA package
over the rated industrial temperature range of -40°C
to +85°C.
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PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
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