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ADC12010CIVY/NOPB PDF预览

ADC12010CIVY/NOPB

更新时间: 2024-11-24 13:05:27
品牌 Logo 应用领域
美国国家半导体 - NSC 转换器
页数 文件大小 规格书
22页 601K
描述
IC 1-CH 12-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PQFP32, LQFP-32, Analog to Digital Converter

ADC12010CIVY/NOPB 技术参数

是否Rohs认证: 符合生命周期:Transferred
包装说明:LQFP, QFP32,.35SQ,32Reach Compliance Code:compliant
ECCN代码:EAR99HTS代码:8542.39.00.01
风险等级:8.08最大模拟输入电压:5 V
转换器类型:ADC, PROPRIETARY METHODJESD-30 代码:S-PQFP-G32
JESD-609代码:e3长度:7 mm
最大线性误差 (EL):0.0366%湿度敏感等级:3
模拟输入通道数量:1位数:12
功能数量:1端子数量:32
最高工作温度:85 °C最低工作温度:-40 °C
输出位码:OFFSET BINARY输出格式:PARALLEL, WORD
封装主体材料:PLASTIC/EPOXY封装代码:LQFP
封装等效代码:QFP32,.35SQ,32封装形状:SQUARE
封装形式:FLATPACK, LOW PROFILE峰值回流温度(摄氏度):260
电源:3,5 V认证状态:Not Qualified
采样速率:10 MHz采样并保持/跟踪并保持:SAMPLE
座面最大高度:1.6 mm子类别:Analog to Digital Converters
标称供电电压:5 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:Matte Tin (Sn)端子形式:GULL WING
端子节距:0.8 mm端子位置:QUAD
处于峰值回流温度下的最长时间:40宽度:7 mm
Base Number Matches:1

ADC12010CIVY/NOPB 数据手册

 浏览型号ADC12010CIVY/NOPB的Datasheet PDF文件第2页浏览型号ADC12010CIVY/NOPB的Datasheet PDF文件第3页浏览型号ADC12010CIVY/NOPB的Datasheet PDF文件第4页浏览型号ADC12010CIVY/NOPB的Datasheet PDF文件第5页浏览型号ADC12010CIVY/NOPB的Datasheet PDF文件第6页浏览型号ADC12010CIVY/NOPB的Datasheet PDF文件第7页 
April 2003  
ADC12010  
12-Bit, 10 MSPS, 160 mW A/D Converter with Internal  
Sample-and-Hold  
General Description  
Features  
n Internal sample-and-hold  
n Outputs 2.4V to 5V compatible  
n TTL/CMOS compatible input/outputs  
n Power down mode  
The ADC12010 is a monolithic CMOS analog-to-digital con-  
verter capable of converting analog input signals into 12-bit  
digital words at 10 Megasamples per second (MSPS), mini-  
mum. This converter uses a differential, pipeline architecture  
with digital error correction and an on-chip sample-and-hold  
circuit to minimize die size and power consumption while  
providing excellent dynamic performance. Operating on a  
single 5V power supply, this device consumes just 160 mW  
at 10 MSPS, including the reference current. The Power  
Down feature reduces power consumption to 25 mW.  
n On-chip reference buffer  
Key Specifications  
n Resolution  
n Conversion Rate  
n DNL  
12 Bits  
10 MSPS (min)  
0.3 LSB (typ)  
0.5 LSB (typ)  
70 dB (typ)  
11.3 bits (typ)  
6 Clock Cycles  
+5V 5%  
The differential inputs provide a full scale input swing equal  
to 2VREF with the possibility of a single-ended input. Full use  
of the differential input is recommended for optimum perfor-  
mance. For ease of use, the buffered, high impedance,  
single-ended reference input is converted on-chip to a differ-  
ential reference for use by the processing circuitry. Output  
data format is 12-bit offset binary.  
n INL  
n SNR (fIN = 10.1 MHz)  
n ENOB (fIN = 10.1 MHz)  
n Data Latency  
n Supply Voltage  
n Power Consumption, 10 MHz  
160 mW (typ)  
This device is available in the 32-lead LQFP package and  
will operate over the industrial temperature range of −40˚C to  
+85˚C.  
Applications  
n Image Processing Front End  
n Instrumentation  
n PC-Based Data Acquisition  
n Fax Machines  
n Wireless Local Loops/Cable Modems  
n Waveform Digitizers  
n DSP Front Ends  
Connection Diagram  
20051601  
TRI-STATE® is a registered trademark of National Semiconductor Corporation.  
© 2003 National Semiconductor Corporation  
DS200516  
www.national.com  

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