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ADAS1131

更新时间: 2024-09-26 14:57:47
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亚德诺 - ADI /
页数 文件大小 规格书
2页 56K
描述
256通道、24位电流数字ADC模块

ADAS1131 数据手册

 浏览型号ADAS1131的Datasheet PDF文件第2页 
256-Channel, 24-Bit  
Current-to-Digital ADC Module  
ADAS1131  
Dosimetry and radiation therapy systems  
Optical fiber power monitoring  
X-ray detection systems  
Data Sheet  
FEATURES  
256-channel, current-to-digital converter module  
Up to 24-bit resolution  
Variable integration time  
Fastest integration time: 11.656 kSPS (86 μs) at 20-bit  
resolution  
Low power dissipation: 3 mW per channel at any throughput  
Integral linearity  
0.015ꢀ of reading 0.4 ppm of FSR: single channel active  
0.050ꢀ of reading 1.0 ppm of FSR: all channels active  
Very low noise  
Simultaneous sampling  
No dead time, no loss of charge, 100ꢀ charge collection  
User adjustable full-scale range  
On-board temperature sensor and reference buffer  
15 mm × 15 mm, CSP_BGA package  
Simple printed circuit board (PCB) design  
Integrated capacitors for supply and reference decoupling  
0.80 mm pitch BGA allows low cost PCB technology  
Support tools  
Evaluation board  
Reference design with reference layout  
FPGA Verilog code  
High channel-count data acquisition systems (current or  
voltage inputs)  
GENERAL DESCRIPTION  
The ADAS1131 is a 256-channel, current-to-digital analog-to-  
digital converter (ADC) module. It contains 256 low power, low  
noise, low input current integrators, simultaneous sample-and-  
holds, and two high speed, high resolution ADCs with configurable  
sampling rate and resolutions of up to 24 bits. The signal chain  
and sampling architecture of the ADAS1131 is designed to  
guarantee that all channels are simultaneously sampled, and  
that no charge is lost throughout the sampling process.  
All converted channel results are output on a single, low voltage  
differential signaling (LVDS), self clocked serial interface,  
which reduces external hardware.  
An SPI-compatible serial interface allows configuration of the  
ADC using the SDI_x input. The SDO_x output allows the user  
to daisy-chain several ADCs on a single, 3-wire bus. The  
ADAS1131 uses the separate supply, IOVDD, to reduce digital  
noise effect on the conversions.  
APPLICATIONS  
The ADAS1131 is in a 15 mm × 15 mm, CSP_BGA package.  
Medical, industrial, and security CT scanner data acquisition  
Photodiode sensors  
FUNCTIONAL BLOCK DIAGRAM  
1.8V  
2.5V  
3.3V  
TO NEXT SDI  
SDO_x  
TO ALL ADCs  
VDD1 VDD2 VDD3  
REF  
SCK  
CS_x  
F
AN0  
CONFIGURATION  
SDI  
S/H  
RESET  
+
ADCL  
F
F
DOUTx_x  
CLKx  
SYNC  
AN127  
AN128  
S/H  
S/H  
LVDS/CMOS  
INTERFACE  
DATA  
PROCESSING  
FPGA  
VIO  
2.5V  
IOVDD  
GND  
TEMPERATURE  
+
ADCH  
F
ADAS1131  
AN255  
KGND  
S/H  
SDI  
FROM DOUT  
OF OTHER ADCs  
REF  
SDI_x  
2.048V  
VT_x  
FROM  
PREVIOUS SDO  
Figure 1.  
For more information about the ADAS1131, email adas@analog.com.  
Rev. Sp0  
Document Feedback  
Information furnished by Analog Devices is believed to be accurate and reliable. However, no  
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other  
rights of third parties that may result from its use. Specifications subject to change without notice. No  
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.  
Trademarks and registeredtrademarks arethe property of their respective owners.  
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.  
Tel: 781.329.4700  
Technical Support  
©2014 Analog Devices, Inc. All rights reserved.  
www.analog.com  

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