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AD9882A/PCB PDF预览

AD9882A/PCB

更新时间: 2022-04-23 23:00:11
品牌 Logo 应用领域
亚德诺 - ADI 显示器
页数 文件大小 规格书
40页 1484K
描述
Dual Interface for Flat Panel Displays

AD9882A/PCB 数据手册

 浏览型号AD9882A/PCB的Datasheet PDF文件第4页浏览型号AD9882A/PCB的Datasheet PDF文件第5页浏览型号AD9882A/PCB的Datasheet PDF文件第6页浏览型号AD9882A/PCB的Datasheet PDF文件第8页浏览型号AD9882A/PCB的Datasheet PDF文件第9页浏览型号AD9882A/PCB的Datasheet PDF文件第10页 
AD9882A  
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS  
GND  
GREEN<7>  
GREEN<6>  
GREEN<5>  
GREEN<4>  
GREEN<3>  
GREEN<2>  
GREEN<1>  
GREEN<0>  
GND  
1
2
75  
74  
73  
72  
71  
70  
69  
PIN 1  
INDICATOR  
MIDBYPASS  
REFBYPASS  
3
V
D
4
GND  
5
R
6
AIN  
V
D
7
8
68 GND  
67  
66 GND  
65  
64 SOGIN  
9
V
D
V
10  
DD  
GND 11  
BLUE<7> 12  
BLUE<6> 13  
G
AIN  
AD9882A  
TOP VIEW  
(Not to Scale)  
63  
62  
61  
60  
59  
58  
57  
56  
55  
54  
53  
52  
51  
V
D
14  
15  
16  
17  
18  
19  
20  
21  
22  
23  
24  
25  
BLUE<5>  
BLUE<4>  
BLUE<3>  
BLUE<2>  
BLUE<1>  
BLUE<0>  
GND  
V
D
GND  
B
AIN  
D
V
GND  
V
V
D
DD  
GND  
CTL 0  
CTL 1  
CTL 2  
CTL 3  
GND  
DDCSDA  
DDCSCL  
PV  
D
GND  
Figure 2. 100-Lead LQFP Pin Configuration  
Table 4. Pin Function Descriptions  
Pin  
Number  
Pin Type  
Mnemonic Function  
Value  
Interface  
Analog  
Analog  
Analog  
Analog  
Analog  
Analog  
Both  
Analog Video Inputs  
RAIN  
GAIN  
Analog Input for Converter R  
Analog Input for Converter G  
0.0 V to 1.0 V  
0.0 V to 1.0 V  
0.0 V to 1.0 V  
3.3 V CMOS  
3.3 V CMOS  
0.0 V to 1.0 V  
3.3 V CMOS  
70  
65  
59  
79  
80  
64  
88  
BAIN  
Analog Input for Converter B  
Horizontal Sync Input  
Vertical Sync Input  
External Sync/Clock  
Sync Outputs  
HSYNC  
VSYNC  
SOGIN  
HSOUT  
Input for Sync-on-Green  
HSYNC Output Clock (Phase-Aligned with  
DATACK)  
VSOUT  
SOGOUT  
VSYNC Output Clock  
Sync-on-Green Slicer Output  
3.3 V CMOS  
3.3 V CMOS  
1.25 V  
87  
89  
73  
74  
48  
Both  
Analog  
Analog  
Analog  
Analog  
References  
REFBYPASS Internal Reference Bypass  
MIDBYPASS Internal Midscale Voltage Bypass  
PLL Filter  
FILT  
Connection for External Filter Components for  
Internal PLL  
Power Supply  
VD  
Analog Power Supply  
Output Power Supply  
PLL Power Supply  
3.15 V to 3.45 V  
2.2 V to 3.6 V  
3.15 V to 3.45 V  
0 V  
Both  
Both  
Both  
Both  
Both  
Both  
Both  
VDD  
PVD  
GND  
SDA  
SCL  
A0  
Ground  
Serial Port Control  
Serial Port Data I/O  
Serial Port Data Clock (100 kHz Maximum)  
Serial Port Address Input  
3.3 V CMOS  
3.3 V CMOS  
3.3 V CMOS  
78  
77  
76  
Rev. 0 | Page 7 of 40  
 

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