Ultrahigh Speed IC
D/A Converter
a
AD9768
FEATURES
FUNCTIO NAL BLO CK D IAGRAM
5 ns Settling Tim e
100 MSPS Update Rate
20 m A Output Current
ECL-Com patible
40 MHz Multiplying Mode
APPLICATIONS
Raster Scan & Vector Graphic Displays
High Speed Waveform Generation
Digital VCOs
Ultrafast Digital Attenuators
GENERAL D ESCRIP TIO N
T he Analog Devices AD9768SD D/A converter is a monolithic
current-output converter which can accept 8 bits of ECL-level
digital input voltages and convert them into analog signals at
update rates as high as 100 MSPS. In addition to its use as a
standard D/A converter, it can also be utilized as a two-quadrant
multiplying D/A at multiplying bandwidths as high as 40 MHz.
T he reference voltage source is a modified bandgap type
and is nominally –1.26 volts. This reference supply requires
no external regulation. T o reduce the possibility of noise
generation and/or instability, Pin 15 (REFERENCE OUT )
can be decoupled using a high-quality ceramic chip
capacitor. Stabilization of the internal loop amplifier is by a
single capacitor connected from Pin 17 (COMPENSATION)
to ground. The minimum value for this capacitor is 3900 pF,
although a 0.01 µF ceramic chip capacitor is recommended.
An inherently low glitch design is used, and the complementary
current outputs are suitable for driving transmission lines
directly. Nominal full-scale output is 20 mA, which corresponds
to a 1 volt drop across a 50 Ω load, or ±1 volt across 100 Ω
returned to +1 volt. T he actual output current is determined by
the on-chip reference voltage (VREF Ϸ –1.26 V) and an external
current setting resistor, RSET
.
Full-scale output current IOUT with digital “1” at all inputs is
calculated with the equation:
T he incredible speed characteristics of the AD9768SD D/A
converter make it attractive for a wide range of high speed
applications. T he ability of the unit to operate as a two-
quadrant multiplying D/A converter adds another dimen-
sion to its usefulness and makes the AD9768SD a truly
versatile device.
VRET –VREF
IOUT = 4 ×
RSET
T he setting resistor RSET and the output load resistor should
both have low temperature coefficients. A complementary
AD 9768SE P IN CO NNECTIO NS
is also provided.
IOUT
AD 9768JD /SD P IN CO NNECTIO NS
REV. A
Inform ation furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assum ed by Analog Devices for its
use, nor for any infringem ents of patents or other rights of third parties
which m ay result from its use. No license is granted by im plication or
otherwise under any patent or patent rights of Analog Devices.
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Tel: 617/ 329-4700
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