14-Bit, 210 MSPS TxDAC®
D/A Converter
Data Sheet
AD9744
FEATURES
APPLICATIONS
High performance member of pin-compatible
TxDAC product family
Wideband communication transmit channel
Direct IFs
Excellent spurious-free dynamic range performance
SFDR to Nyquist
83 dBc at 5 MHz output
Base stations
Wireless local loops
Digital radio links
80 dBc at 10 MHz output
73 dBc at 20 MHz output
Direct digital synthesis (DDS)
Instrumentation
SNR at 5 MHz output, 125 MSPS: 77 dB
Twos complement or straight binary data format
Differential current outputs: 2 mA to 20 mA
Power dissipation: 135 mW at 3.3 V
Power-down mode: 15 mW at 3.3 V
On-chip 1.2 V reference
CMOS-compatible digital interface
28-lead SOIC, 28-lead TSSOP, and 32-lead LFCSP packages
Edge-triggered latches
FUNCTIONAL BLOCK DIAGRAM
3.3V
REFLO
1.2V REF
REFIO
AVDD ACOM
150pF
0.1µF
AD9744
CURRENT
SOURCE
ARRAY
FS ADJ
R
SET
3.3V
DVDD
DCOM
IOUTA
IOUTB
SEGMENTED
SWITCHES
LSB
SWITCHES
CLOCK
MODE
CLOCK
LATCHES
DIGITAL DATA INPUTS (DB13–DB0)
SLEEP
Figure 1.
GENERAL DESCRIPTION
The AD97441 is a 14-bit resolution, wideband, third generation
member of the TxDAC series of high performance, low power
CMOS digital-to-analog converters (DACs). The TxDAC family,
consisting of pin-compatible 8-, 10-, 12-, and 14-bit DACs, is
specifically optimized for the transmit signal path of communi-
cation systems. All of the devices share the same interface options,
small outline package, and pinout, providing an upward or
downward component selection path based on performance,
resolution, and cost. The AD9744 offers exceptional ac and dc
performance while supporting update rates up to 210 MSPS.
Edge-triggered input latches and a 1.2 V temperature compensated
band gap reference have been integrated to provide a complete
monolithic DAC solution. The digital inputs support 3 V
CMOS logic families.
PRODUCT HIGHLIGHTS
1. The AD9744 is the 14-bit member of the pin compatible TxDAC
family, which offers excellent INL and DNL performance.
2. Data input supports twos complement or straight binary data
coding.
3. High speed, single-ended CMOS clock input supports
The AD9744’s low power dissipation makes it well suited for
portable and low power applications. Its power dissipation can
be further reduced to a mere 60 mW with a slight degradation
in performance by lowering the full-scale current output. Also,
a power-down mode reduces the standby power dissipation to
approximately 15 mW. A segmented current source architecture
is combined with a proprietary switching technique to reduce
spurious components and enhance dynamic performance.
210 MSPS conversion rate.
4. Low power: Complete CMOS DAC function operates on
135 mW from a 2.7 V to 3.6 V single supply. The DAC full-
scale current can be reduced for lower power operation, and a
sleep mode is provided for low power idle periods.
5. On-chip voltage reference: The AD9744 includes a 1.2 V
temperature compensated band gap voltage reference.
6. Industry-standard 28-lead SOIC, 28-lead TSSOP, and 32-lead
LFCSP packages.
1Protected by U.S. Patent Numbers 5568145, 5689257, and 5703519.
Rev. C
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