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AD9705BCPZ

更新时间: 2024-11-20 03:28:39
品牌 Logo 应用领域
亚德诺 - ADI 转换器数模转换器
页数 文件大小 规格书
52页 2134K
描述
8-/10-/12-/14-Bit, 175 MSPS TxDAC D/A Converters

AD9705BCPZ 数据手册

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8-/10-/12-/14-Bit, 175 MSPS  
TxDAC® D/A Converters  
AD9704/AD9705/AD9706/AD9707  
FUNCTIONAL BLOCK DIAGRAM  
FEATURES  
1.7V TO 3.6V  
Pin-compatible family  
Low power member of pin-compatible  
TxDAC product family  
AVDD  
ACOM  
1.0V REF  
REFIO  
0.1µF  
AD9707  
CURRENT  
SOURCE  
ARRAY  
OTCM  
FS ADJ  
1.7V  
TO  
Power dissipation @ 3.3 V  
22 mW @ 10 MSPS  
25 mW @ 25 MSPS  
CLKVDD  
CLKCOM  
IOUTA  
IOUTB  
R
SET  
SEGMENTED  
SWITCHES  
LSB  
SWITCHES  
3.6V  
CLK+  
CLK–  
PIN/SPI/RESET  
MODE/SDIO  
LATCHES  
SPI  
1.7V TO  
3.6V  
30 mW @ 50 MSPS  
Sleep mode: 3.1 mW @ 3.3 V  
CMODE/SCLK  
DVDD  
DCOM  
SLEEP/CSB  
DIGITAL INPUTS (DB13 TO DB0)  
Supply voltage: 1.7 V to 3.6 V  
SFDR to Nyquist  
Figure 1. AD9707  
AD9707: 84 dBc @ 5 MHz output  
AD9707: 83 dBc @ 10 MHz output  
AD9707: 75 dBc @ 20 MHz output  
AD9707 NSD @ 10 MHz output, 125 MSPS: −147 dBc/Hz  
Differential current outputs: 1 mA to 5 mA  
Data format: twos complement or straight binary  
On-chip 1.0 V reference  
CMOS-compatible digital interface  
Edge-triggered latches  
Clock input: single-ended and differential  
Output common mode: adjustable 0 V to 1.2 V  
Power-down mode < 2 mW @ 3.3 V (SPI® controllable)  
Serial peripheral interface (SPI)  
Self-calibration  
32-lead LFCSP_VQ, Pb-free package  
PRODUCT HIGHLIGHTS  
5. CMOS Clock Input. High speed, single-ended, and  
differential CMOS clock input supports 175 MSPS  
conversion rate.  
1. Pin Compatible. The AD970x line of TxDACs is pin-  
compatible with the AD974x TxDAC line (LFCSP_VQ  
package).  
2. Low Power. Complete CMOS DAC operates on a single  
supply of 3.6 V down to 1.7 V, consuming 25 mW (3.3 V)  
and 10 mW (1.8 V). The DAC full-scale current can be  
reduced for lower power operation, and sleep and power-  
down modes are provided for low power idle periods.  
6. SPI Control. SPI control offers a higher level of  
programmability.  
7. Easy Interfacing to Other Components. Adjustable output  
common mode from 0 V to 1.2 V allows for easy interfacing  
to other components that accept common-mode levels  
greater than 0 V.  
3. Self-calibration. Self-calibration enables true 14-bit INL  
and DNL performance in the AD9707.  
8. On-Chip Voltage Reference. The AD970x includes a 1.0 V  
temperature-compensated band gap voltage reference.  
4. Twos Complement/Binary Data Coding Support. Data input  
supports twos complement or straight binary data coding.  
9. Industry-Standard 32-Lead LFCSP_VQ Package.  
Rev. 0  
Information furnished by Analog Devices is believed to be accurate and reliable. However, no  
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other  
rights of third parties that may result from its use. Specifications subject to change without notice. No  
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.  
Trademarks and registeredtrademarks arethe property of their respective owners.  
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.  
Tel: 781.329.4700  
Fax: 781.461.3113  
www.analog.com  
©2006 Analog Devices, Inc. All rights reserved.  
 

AD9705BCPZ 替代型号

型号 品牌 替代类型 描述 数据表
AD9705BCPZRL7 ADI

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