AD9683
Data Sheet
SPECIFICATIONS
ADC DC SPECIFICATIONS
AVDD = 1.8 V, DRVDD = 1.8 V, DVDD = 1.8 V, maximum sample rate for speed grade, VIN = −1.0 dBFS differential input, 1.75 V p-p
full-scale input range, duty cycle stabilizer enabled, default SPI, unless otherwise noted.
Table 1.
AD9683-170
Typ
AD9683-250
Typ
Parameter
Temperature
Min
Max
Min
Max
Unit
RESOLUTION
ACCURACY
Full
14
14
Bits
No Missing Codes
Offset Error
Gain Error
Differential Nonlinearity (DNL) Full
25°C
Integral Nonlinearity (INL)1
Full
Full
Full
Guaranteed
Guaranteed
±±
−6.6/−0.3
±0.8
±±
−5.3/+1.2
±0.75
mV
%FSR
LSB
LSB
LSB
LSB
±0.5
±0.8
±0.5
±1.5
Full
25°C
±1.6
±2.7
TEMPERATURE DRIFT
Offset Error
Gain Error
Full
Full
±7
±13
±7
±3±
ppm/°C
ppm/°C
INPUT REFERRED NOISE
VREF = 1.75 V
25°C
1.38
1.42
LSB rms
ANALOG INPUT
Input Span
Full
Full
Full
Full
1.75
2.5
20
1.75
2.5
20
V p-p
pF
kΩ
V
Input Capacitance2
Input Resistance3
Input Common-Mode Voltage
POWER SUPPLIES
Supply Voltage
AVDD
0.±
0.±
Full
Full
Full
1.7
1.7
1.7
1.8
1.8
1.8
1.±
1.±
1.±
1.7
1.7
1.7
1.8
1.8
1.8
1.±
1.±
1.±
V
V
V
DRVDD
DVDD
Supply Current
IAVDD
IDRVDD + IDVDD
Full
Full
135
68
151
73
14±
±2
163
±7
mA
mA
POWER CONSUMPTION
Sine Wave Input
Standby Power4
Power-Down Power5
Full
Full
Full
365
221
±
403
434
266
±
468
mW
mW
mW
1 Measured with a low input frequency, full-scale sine wave.
2 Input capacitance refers to the effective capacitance between one differential input pin and its complement.
3 Input resistance refers to the effective resistance between one differential input pin and its complement.
4 Standby power is measured with a low input frequency, full-scale sine wave, and the CLK± pins active. Address 0x08 is set to 0x20, and the PDWN pin is asserted.
5 Power-down power is measured with a low input frequency, a full-scale sine wave, RFCLK pulled high, and the CLK± pins active. Address 0x08 is set to 0x00, and the
PDWN pin is asserted.
Rev. 0 | Page 4 of 44