Datasheet > AD9553BCPZ-REEL7

AD9553BCPZ-REEL7

更新时间： 2024-02-16 09:21:27

品牌	Logo	应用领域
亚德诺 - ADI		以太网时钟
页数	文件大小	规格书
44页	679K
描述
Flexible Clock Translator for GPON, Base Station, SONET/SDH, T1/E1, and Ethernet

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AD9553BCPZ-REEL7 技术参数

是否无铅：	含铅	是否Rohs认证：	符合
生命周期：	Active	零件包装代码：	QFN
包装说明：	HVQCCN, LCC32,.2SQ,20	针数：	32
Reach Compliance Code：	compliant	ECCN代码：	EAR99
HTS代码：	8542.39.00.01	风险等级：	5.27
应用程序：	SONET;SDH	JESD-30 代码：	S-XQCC-N32
JESD-609代码：	e3	长度：	5 mm
湿度敏感等级：	1	功能数量：	1
端子数量：	32	最高工作温度：	85 °C
最低工作温度：	-40 °C	封装主体材料：	UNSPECIFIED
封装代码：	HVQCCN	封装等效代码：	LCC32,.2SQ,20
封装形状：	SQUARE	封装形式：	CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
峰值回流温度（摄氏度）：	260	电源：	3.3 V
认证状态：	Not Qualified	座面最大高度：	0.8 mm
子类别：	Other Telecom ICs	最大压摆率：	0.185 mA
标称供电电压：	3.3 V	表面贴装：	YES
技术：	CMOS	电信集成电路类型：	ATM/SONET/SDH SUPPORT CIRCUIT
温度等级：	INDUSTRIAL	端子面层：	Matte Tin (Sn)
端子形式：	NO LEAD	端子节距：	0.5 mm
端子位置：	QUAD	处于峰值回流温度下的最长时间：	30
宽度：	5 mm

AD9553BCPZ-REEL7 数据手册

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AD9553

REFB Frequency Control (Register 0x23 to Register 0x26)

Table 35.

Address

Bit

Bit Name

Description

0x23

[7:0]

[7:2]

REFB divider (R_B)

Bits[13:6] of the 14-bit REFB divider.

0x24

Bits[5:0] of the 14-bit REFB divider (default: R_B= 4096 decimal).

The REFB divider bits are ineffective unless Register 0x24[1] = 1.

Enable SPI control of R_B

Enables SPI port control of the REFB divider value (R_B).

0 = The A[3:0] pins define R_Bper Table 14 (default).

1 = The 14-bit value in the REFB divider register defines R_B.

Unused

Unused.

0x25

Enable SPI control of x2_B

Enables SPI control of the REFB 2x frequency multiplier (x2_B) per Register 0x25[6].

0 = the device automatically selects x2_Bper Table 14 (default).

1 =Register 0x25[6] controls the selection of x2_B.

Select x2_B

Selects x2_B.

0 = bypass x2_B(default).

1 = select x2_B.

This bit is ineffective unless Register 0x25[7] = 1.

Enable SPI control of /5_B

Select /5_B

Enables SPI control of the /5_Bprescaler per Register 0x25[4].

0 = the device automatically selects /5_Bper Table 14 (default).

1 = Register 0x25[4] controls the selection of /5_B.

Selects /5_B.

0 = bypass /5_B(default).

1 = select /5_B.

This bit is ineffective unless Register 0x25[5] = 1.

[3:0]

[7:0]

Unused

Unused.

0x26

DCXO Frequency and Reference Switchover Control (Register 0x27 to Register 0x31)

Table 36.

Address

Bit

Bit Name

Description

0x27

[7:0]

[7:2]

XO divider (R_XO)

Bits[13:6] of the 14-bit XO divider.

0x28

Bits[5:0] of the 14-bit XO divider (default: R_XO= 2048 decimal).

The XO divider bits are ineffective unless Register 0x28[1] = 1.

Enable SPI control of R_XO

Enables SPI port control of the XO divider value (R_XO).

0 = The A[3:0] pins define R_XOper Table 14 (default).

1 = The 14-bit value in the XO divider register defines R_XO.

Unused

Unused.

0x29

[7:6]

Switchover mode

Selects the switchover operating mode.

00 = revertive switchover (default).

01 = nonrevertive switchover.

10 = selects REFA as the active reference.

11 = selects REFB as the active reference.

REFA diff

Enables the differential input reference function.

0 = normal single-ended operation of REFA and REFB (default).

1 = REFA configured as a differential reference in which the REFA pin functions as

one differential input and the REFB/REFA pin functions as the other differential input.

In this configuration, the REFB channel and switchover functionality are both

unavailable.

[4:0]

[7:0]

Unused

Unused.

0x2A to

0x31

Rev. 0 | Page 38 of 44

1...35 36 373839 40 41...44

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