Complete 12-Bit 1.5/3.0/10.0 MSPS
Monolithic A/D Converters
a
AD9221/AD9223/AD9220
FEATURES
FUNCTIONAL BLOCK DIAGRAM
Monolithic 12-Bit A/D Converter Product Family
Family Members Are: AD9221, AD9223, and AD9220
Flexible Sampling Rates: 1.5 MSPS, 3.0 MSPS and
10.0 MSPS
Low Power Dissipation: 59 mW, 100 mW and 250 mW
Single +5 V Supply
AVDD
DVDD
CLK
SHA
VINA
VINB
MDAC1
GAIN = 16
MDAC2
GAIN = 8
MDAC3
GAIN = 4
5
4
3
A/D
A/D
A/D
A/D
Integral Nonlinearity Error: 0.5 LSB
Differential Nonlinearity Error: 0.3 LSB
Input Referred Noise: 0.09 LSB
Complete: On-Chip Sample-and-Hold Amplifier and
Voltage Reference
Signal-to-Noise and Distortion Ratio: 70 dB
Spurious-Free Dynamic Range: 86 dB
Out-of-Range Indicator
CAPT
CAPB
5
4
3
3
DIGITAL CORRECTION LOGIC
12
VREF
OUTPUT BUFFERS
OTR
SENSE
BIT 1
(MSB)
1V
MODE
SELECT
BIT 12
(LSB)
AD9221/AD9223/AD9220
REFCOM
CML
AVSS
DVSS
Straight Binary Output Data
28-Lead SOIC and 28-Lead SSOP
PRODUCT DESCRIPTION
suited for communication systems employing Direct-IF Down
Conversion since the SHA in the differential input mode can
achieve excellent dynamic performance far beyond its specified
Nyquist frequency.2
The AD9221, AD9223, and AD9220 are a generation of high
performance, single supply 12-bit analog-to-digital converters.
Each device exhibits true 12-bit linearity and temperature drift
performance1 as well as 11.5 bit or better ac performance.2 The
AD9221/AD9223/AD9220 share the same interface options,
package, and pinout. Thus, the product family provides an
upward or downward component selection path based on per-
formance, sample rate and power. The devices differ with re-
spect to their specified sampling rate and power consumption
which is reflected in their dynamic performance over frequency.
A single clock input is used to control all internal conversion
cycles. The digital output data is presented in straight binary
output format. An out-of-range (OTR) signal indicates an
overflow condition which can be used with the most significant
bit to determine low or high overflow.
PRODUCT HIGHLIGHTS
The AD9221/AD9223/AD9220 family offers a complete single-
chip sampling 12-bit, analog-to-digital conversion function in
pin-compatible 28-lead SOIC and SSOP packages.
The AD9221/AD9223/AD9220 combine a low cost, high speed
CMOS process and a novel architecture to achieve the resolution
and speed of existing hybrid and monolithic implementations at
a fraction of the power consumption and cost. Each device is a
complete, monolithic ADC with an on-chip, high performance,
low noise sample-and-hold amplifier and programmable voltage
reference. An external reference can also be chosen to suit the dc
accuracy and temperature drift requirements of the application.
The devices use a multistage differential pipelined architecture with
digital output error correction logic to provide 12-bit accuracy at
the specified data rates and to guarantee no missing codes over the
full operating temperature range.
Flexible Sampling Rates—The AD9221, AD9223 and AD9220
offer sampling rates of 1.5 MSPS, 3.0 MSPS and 10.0 MSPS,
respectively.
Low Power and Single Supply—The AD9221, AD9223 and
AD9220 consume only 59 mW, 100 mW and 250 mW, respec-
tively, on a single +5 V power supply.
Excellent DC Performance Over Temperature—The AD9221/
AD9223/AD9220 provide 12-bit linearity and temperature drift
performance.1
The input of the AD9221/AD9223/AD9220 is highly flexible,
allowing for easy interfacing to imaging, communications, medi-
cal, and data-acquisition systems. A truly differential input
structure allows for both single-ended and differential input
interfaces of varying input spans. The sample-and-hold (SHA)
amplifier is equally suited for both multiplexed systems that
switch full-scale voltage levels in successive channels as well as
sampling single-channel inputs at frequencies up to and beyond
the Nyquist rate. Also, the AD9221/AD9223/AD9220 is well
Excellent AC Performance and Low Noise—The AD9221/
AD9223/AD9220 provides better than 11.3 ENOB performance
and has an input referred noise of 0.09 LSB rms.2
Flexible Analog Input Range—The versatile onboard sample-
and-hold (SHA) can be configured for either single ended or differ-
ential inputs of varying input spans.
NOTES
1Excluding internal voltage reference.
2Depends on the analog input configuration.
REV. D
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
Fax: 781/326-8703
World Wide Web Site: http://www.analog.com
© Analog Devices, Inc., 2000
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